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参数资料
| 型号： | LOG114AIRGVRG4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 模拟运算功能 |
| 英文描述： | LOG OR ANTILOG AMPLIFIER, PQCC16 |
| 封装： | 4 X 4 MM, GREEN, PLASTIC, QFN-16 |
| 文件页数： | 15/29页 |
| 文件大小： | 637K |
| 代理商： | LOG114AIRGVRG4 |
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LOG114
SBOS301A MAY 2004 REVISED MARCH 2007
www.ti.com
22
For example, in a system configured for measurement
of five decades, with I1 = 1mA, and I2 = 10A:
V
LOGOUT IDEAL + 0.375
log
10*3
10*5
+ 0.75V
V
LOGOUT TYP + 0.375(1 " 0.004)
log
103
*5
1012
105
*5
1012
" 2(0.001)(5) " 0.011
Using the positive error components (+
K, +2Nm, and
+VOSO) to calculate the maximum typical output:
V
LOGOUT TYP + 0.774V
Therefore, the error in percent is:
%error
+
|0.75
*0.774|
0.75
100%
+ 3.2%
QFN PACKAGE
The LOG114 comes in a QFN-16 package. This lead-
less package has lead contacts on all four sides of the
bottom of the package, thereby maximizing board
space. An exposed leadframe die pad on the bottom of
the package enhances thermal and electrical charac-
teristics.
QFN packages are physically small, have a smaller
routing area, improved thermal performance, and im-
proved electrical parasitics. Additionally, the absence of
external leads eliminates bent-lead issues.
The QFN package can be easily mounted using stan-
dard printed circuit board (PCB) assembly techniques.
See Application Note QFN/SON PCB Attachment
(SLUA271) and Application Report Quad Flatpack No
Lead Logic Packages (SCBA017), both available for
download at www.ti.com.
The exposed leadframe die pad on the bottom of
the package should be connected to V.
QFN LAYOUT GUIDELINES
The exposed leadframe die pad on the QFN package
should be soldered to a thermal pad on the PCB. A me-
chanical drawing showing an example layout is at-
tached at the end of this data sheet. Refinements to this
layout may be necessary based on assembly process
requirements. Mechanical drawings located at the end
of this data sheet list the physical dimensions for the
package and pad. The five holes in the landing pattern
are optional, and are intended for use with thermal vias
that connect the leadframe die pad to the heatsink area
on the PCB.
Soldering the exposed pad significantly improves
board-level reliability during temperature cycling, key
push, package shear, and similar board-level tests.
Even with applications that have low-power dissipation,
the exposed pad must be soldered to the PCB to pro-
vide structural integrity and long-term reliability.
(22)
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相关PDF资料 |
PDF描述 |
|---|---|
| LOG114AIRGVT | LOG OR ANTILOG AMPLIFIER, PQCC16 |
| LOG2112AIDWE4 | LOG OR ANTILOG AMPLIFIER, PDSO16 |
| LOG2112AIDW | LOG OR ANTILOG AMPLIFIER, 1.4 MHz BAND WIDTH, PDSO16 |
| LOG2112AIDWRE4 | LOG OR ANTILOG AMPLIFIER, PDSO16 |
| LOG112AIDE4 | LOG OR ANTILOG AMPLIFIER, PDSO14 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| LOG114AIRGVT | 功能描述:对数放大器 Precision High-Speed RoHS:否 制造商:Texas Instruments 通道数量:3 带宽:3 dB 共模抑制比（最小值）: 输入补偿电压:+/- 7 mV 输入电压范围（最大值）:5.5 V 工作电源电压:4.5 V to 5.5 V 电源电流:+/- 15 mA 工作温度范围:- 40 C to +85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-16 封装:Reel |
| LOG114AIRGVTG4 | 功能描述:对数放大器 Prec High-Speed Logarithmic Amp RoHS:否 制造商:Texas Instruments 通道数量:3 带宽:3 dB 共模抑制比（最小值）: 输入补偿电压:+/- 7 mV 输入电压范围（最大值）:5.5 V 工作电源电压:4.5 V to 5.5 V 电源电流:+/- 15 mA 工作温度范围:- 40 C to +85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-16 封装:Reel |
| LOG114EVM | 功能描述:放大器 IC 开发工具 LOG114 Eval Mod RoHS:否 制造商:International Rectifier 产品:Demonstration Boards 类型:Power Amplifiers 工具用于评估:IR4302 工作电源电压:13 V to 23 V |
| LOG1527 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:由CMOS工艺设计制造的可内烧的学习码编码IC. |
| LOG2112 | 制造商:TI 制造商全称:Texas Instruments 功能描述:LOGARITHMIC AND LOG RATIO AMPLIFIERS |
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