参数资料
型号: LP2975AIMM-12/NOPB
厂商: NATIONAL SEMICONDUCTOR CORP
元件分类: 模拟信号调理
英文描述: SPECIALTY ANALOG CIRCUIT, PDSO8
封装: MINI, SOP-8
文件页数: 10/20页
文件大小: 1135K
代理商: LP2975AIMM-12/NOPB
Application Hints (Continued)
High ESR Unstable without Feed-Forward
10003429
As shown, moving the location of f
z lower in frequency
extends the bandwidth, pushing the crossover frequency f
c
out to about 200 kHz. In viewing the plot, it can be seen that
f
p and fz essentially cancel out, leaving only the controller
pole and f
pg. However, since fpg now occurs well before fc,it
will cause enough phase shift to leave very little phase
margin. This application would either oscillate continuously
or be marginally stable (meaning it would exhibit severe
ringing on transient steps).
This can be improved by adding a feed-forward capacitor C
F,
which adds a zero (f
zf) and a pole (fpf) to the gain plot (see
graph HIGH ESR CORRECTED WITH FEED-FORWARD).
In this case, C
F is selected to place fzf at about the same
frequency as f
pg (essentially cancelling out the phase shift
due to f
pg). Assuming the added pole fpf is near or beyond
the f
c frequency, it will add < 45 of phase lag, leaving a
phase margin of > 45 (adequate for good stability).
High ESR Corrected with Feed-Forward
10003431
LOW ESR: To illustrate how an output capacitor with low
ESR can cause an LDO regulator to oscillate, the same
example will be shown except that the ESR will be reduced
sufficiently to increase the original f
z from 5 kHz to 50 kHz.
The plot now shows (see graph LOW ESR UNSTABLE
WITHOUT FEED-FORWARD) that the crossover frequency
f
c has moved down to about 8 kHz. Since fz is 6X fc, it means
that the zero f
z can only provide about 9 of phase lead at fc,
which is not sufficient for stability.
Low ESR Unstable without Feed-Forward
10003430
This application can also be improved by adding a feed-
forward capacitor. C
F will add both a zero fzf and pole fpf to
the gain plot (see graph LOW ESR CORRECTED WITH
FEED-FORWARD).
The crossover frequency f
c is now about 10 kHz. If CF is
selected so that f
zf is about 5 kHz, and fpf is about 20 kHz
(which means V
OUT = 5V), the phase margin will be consid-
erably improved. Calculating out all the poles and zeroes,
the phase margin is increased from 9 to 43 (adequate for
good stability).
Low ESR Corrected with Feed-Forward
10003432
EXCESSIVE GATE CAPACITANCE: Higher values of gate
capacitance shift the pole f
pg to lower frequencies, which can
cause stability problems (see previous section GATE CA-
PACITANCE POLE FREQUENCY). As shown in the graph
f
pg vs. CEFF, the pole fpg will likely fall somewhere between
40 kHz and 500 kHz. How much phase shift this adds
depends on the crossover frequency f
c.
The effect of gate capacitance becomes most important at
high values of ESR for the output capacitor (see graph HIGH
ESR UNSTABLE WITHOUT FEED-FORWARD). Higher val-
ues of ESR increase f
c, which brings fpg more into the
positive gain portion of the curve. As f
pg moves to a lower
frequency (corresponding to higher values of gate capaci-
tance), this effect becomes even worse.
This points out why FET’s should be selected with the lowest
possible gate capacitance: it makes the design more tolerant
of higher ESR values on the output capacitor.
The use of a feed-forward capacitor C
F will help reduce
excess phase shift due to f
pg, but its effectiveness depends
on output voltage (see next section).
LP2975
www.national.com
18
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