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参数资料
| 型号： | LP3470M5X-3.65/NOPB |
| 厂商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分类： | 电源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5 |
| 封装： | SOT-23, 5 PIN |
| 文件页数： | 3/8页 |
| 文件大小： | 559K |
| 代理商： | LP3470M5X-3.65/NOPB |
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
V
CC Voltage
0.3V to +6V
Reset Voltage
0.3V to +6V
Output Current (Reset)
10 mA
Operating Temperature Range
LP3470
20C to +85C
LP3470I
40C to +85C
Junction Temperature (T
Jmax)
125C
Power Dissipation (T
A = 25C) (Note
300 mW
θ
JA (Note 2)
280C/W
Storage Temp. Range
65C to +150C
Lead Temp. (Soldering, 5 sec)
260C
ESD Rating (Note 3)
2 kV
Electrical Characteristics
Limits in standard typeface are for T
J = 25C, and limits in boldface type apply over the full operating temperature range, un-
less otherwise specified. V
CC = +2.4V to +5.0V unless otherwise noted.
Symbol
Parameter
Conditions
Typ
Min
Max
Units
V
CC
Operating Voltage Range
0.5
5.5
V
I
CC
V
CC Supply Current
V
CC = 4.5V
16
30
A
V
RTH
Reset Threshold Voltage (Note 6)
LP3470
V
RTH
0.99
V
RTH
0.99
V
RTH
1.01
V
RTH
1.01
V
RTH
V
LP3470I
V
RTH
0.99
V
RTH
0.985
V
RTH
1.01
V
RTH
1.015
V
RTH
V
HYST
Hysteresis Voltage (Note 7)
35
15
65
mV
t
PD
V
CC to Reset Delay
V
CC falling at 1 mV/s
100
300
s
t
RP
Reset Timeout Period (Note 8)
C
1 =1nF
2
1.0
3.5
ms
V
OL
Reset Output Voltage Low
V
CC = 0.5V; IOL =30A
0.1
V
CC = 1.0V; IOL = 100 A
0.1
V
CC =VRTH 100 mV; IOL =4mA
0.4
R
1
External Pull-up Resistor
20
0.68
68
k
I
LEAK
Reset Output Leakage Current
0.15
1
A
6
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Electrical specifications do not apply when operating the device
beyond its operating conditions.
Note 2: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (Maximum Junction Temperature), θJA (Junction to
Ambient Thermal Resistance), and TA (Ambient Temperature). The maximum allowable power dissipation at any temperature is PDmax =(TJmax TA)/ θJA or the
number given in the Absolute Maximum Ratings, whichever is lower.
Note 3: The Human Body Model is a 100 pF capacitor discharged through a 1.5 k
resistor into each pin.
Note 4: Typical numbers are at 25C and represent the most likely parametric norm.
Note 5: Min. and Max. limits in standard typeface are 100% production tested at 25C. Min. and Max. limits in boldface are guaranteed through correlation using
Statistical Quality Control (SQC) methods. The limits are used to calculate National’s Average Outgoing Quality Level (AOQL).
Note 6: Factory-trimmed reset thresholds are available in 50 mV increments from 2.4V to 5.0V. Contact your National Semiconductor representative.
Note 7: VHYST affects the relation between VCC and Reset as shown in the timing diagram.
Note 8: tRP is programmable by varying the value of the external capacitor (C1) connected to pin SRT. The equation is: tRP =2000xC1 (C1 in F and tRP in ms).
LP3470
www.national.com
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