参数资料
型号: LP3875ES-ADJ/NOPB
厂商: National Semiconductor
文件页数: 9/20页
文件大小: 0K
描述: IC REG LDO ADJ 1.5A TO263-5
标准包装: 45
稳压器拓扑结构: 正,可调式
输出电压: 可调
输入电压: 2.5 V ~ 7 V
电压 - 压降(标准): 0.38V @ 1.5A
稳压器数量: 1
电流 - 输出: 1.5A(最小值)
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: TO-263-6,D²Pak(5 引线+接片),TO-263BA
供应商设备封装: TO-263-5
包装: 管件
产品目录页面: 1292 (CN2011-ZH PDF)
其它名称: *LP3875ES-ADJ
*LP3875ES-ADJ/NOPB
LP3875ES-ADJ
SNVS247D – SEPTEMBER 2003 – REVISED APRIL 2013
It should be noted that stability problems have been seen in applications where "vias" to an internal ground plane
were used at the ground points of the IC and the input and output capacitors. This was caused by varying ground
potentials at these nodes resulting from current flowing through the ground plane. Using a single point ground
technique for the regulator and it's capacitors fixed the problem.
Since high current flows through the traces going into V IN and coming from V OUT , Kelvin connect the capacitor
leads to these pins so there is no voltage drop in series with the input and output capacitors.
RFI/EMI SUSCEPTIBILITY
RFI (radio frequency interference) and EMI (electromagnetic interference) can degrade any integrated circuit's
performance because of the small dimensions of the geometries inside the device. In applications where circuit
sources are present which generate signals with significant high frequency energy content (> 1 MHz), care must
be taken to ensure that this does not affect the IC regulator.
If RFI/EMI noise is present on the input side of the regulator (such as applications where the input source comes
from the output of a switching regulator), good ceramic bypass capacitors must be used at the input pin of the IC.
If a load is connected to the IC output which switches at high speed (such as a clock), the high-frequency current
pulses required by the load must be supplied by the capacitors on the IC output. Since the bandwidth of the
regulator loop is less than 100 kHz, the control circuitry cannot respond to load changes above that frequency.
The means the effective output impedance of the IC at frequencies above 100 kHz is determined only by the
output capacitor(s).
In applications where the load is switching at high speed, the output of the IC may need RF isolation from the
load. It is recommended that some inductance be placed between the output capacitor and the load, and good
RF bypass capacitors be placed directly across the load.
PCB layout is also critical in high noise environments, since RFI/EMI is easily radiated directly into PC traces.
Noisy circuitry should be isolated from "clean" circuits where possible, and grounded through a separate path. At
MHz frequencies, ground planes begin to look inductive and RFI/EMI can cause ground bounce across the
ground plane.
In multi-layer PCB applications, care should be taken in layout so that noisy power and ground planes do not
radiate directly into adjacent layers which carry analog power and ground.
OUTPUT NOISE
Noise is specified in two ways-
Spot Noise or Output noise density is the RMS sum of all noise sources, measured at the regulator output, at
a specific frequency (measured with a 1Hz bandwidth). This type of noise is usually plotted on a curve as a
function of frequency.
Total output Noise or Broad-band noise is the RMS sum of spot noise over a specified bandwidth, usually
several decades of frequencies.
Attention should be paid to the units of measurement. Spot noise is measured in units μV/ √ Hz or nV/ √ Hz and
total output noise is measured in μV(rms).
The primary source of noise in low-dropout regulators is the internal reference. In CMOS regulators, noise has a
low frequency component and a high frequency component, which depend strongly on the silicon area and
quiescent current. Noise can be reduced in two ways: by increasing the transistor area or by increasing the
current drawn by the internal reference. Increasing the area will decrease the chance of fitting the die into a
smaller package. Increasing the current drawn by the internal reference increases the total supply current
(ground pin current). Using an optimized trade-off of ground pin current and die size, LP3875-ADJ achieves low
noise performance and low quiescent current operation.
The total output noise specification for LP3875-ADJ is presented in the Electrical Characteristics table. The
Output noise density at different frequencies is represented by a curve under typical performance characteristics.
Copyright ? 2003–2013, Texas Instruments Incorporated
Product Folder Links: LP3875-ADJ
9
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相关代理商/技术参数
参数描述
LP3875ESX-1.8 功能描述:低压差稳压器 - LDO RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压(最大值):307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20
LP3875ESX-1.8/NOPB 功能描述:低压差稳压器 - LDO RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压(最大值):307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20
LP3875ESX-2.5 功能描述:低压差稳压器 - LDO RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压(最大值):307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20
LP3875ESX-2.5/NOPB 功能描述:低压差稳压器 - LDO RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压(最大值):307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20
LP3875ESX-3.3 功能描述:低压差稳压器 - LDO RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压(最大值):307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20