参数资料
型号: LPC1224FBD64/121,1
厂商: NXP Semiconductors
文件页数: 61/61页
文件大小: 0K
描述: MCU 32BIT 48K FLASH 4K 64-LQFP
产品培训模块: LPC1200 Series for Industrial Control
标准包装: 160
系列: LPC1200
核心处理器: ARM? Cortex?-M0
芯体尺寸: 32-位
速度: 45MHz
连通性: I²C,IrDA,Microwire,SPI,SSI,SSP,UART/USART
外围设备: 欠压检测/复位,DMA,POR,WDT
输入/输出数: 55
程序存储器容量: 48KB(48K x 8)
程序存储器类型: 闪存
RAM 容量: 4K x 8
电压 - 电源 (Vcc/Vdd): 3 V ~ 3.6 V
数据转换器: A/D 8x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 64-LQFP
包装: 托盘
其它名称: 568-5156
LPC1224FBD64/221
LPC1224FBD64/221,1
LPC122X
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 26 August 2011
9 of 61
NXP Semiconductors
LPC122x
32-bit ARM Cortex-M0 microcontroller
PIO0_7/CTS0/
CT32B1_CAP1/
CT32B1_MAT1
22 26
yes
I/O
I; PU
PIO0_7 — General purpose digital input/output pin.
I-
CTS0 — Clear To Send input for UART0.
I-
CT32B1_CAP1 — Capture input, channel 1 for 32-bit timer 1.
O-
CT32B1_MAT1 — Match output, channel 1 for 32-bit timer 1.
PIO0_8/RXD1/
CT32B1_CAP2/
CT32B1_MAT2
23 27
yes
I/O
I; PU
PIO0_8 — General purpose digital input/output pin.
I-
RXD1 — Receiver input for UART1.
I-
CT32B1_CAP2 — Capture input, channel 2 for 32-bit timer 1.
O-
CT32B1_MAT2 — Match output, channel 2 for 32-bit timer 1.
PIO0_9/TXD1/
CT32B1_CAP3/
CT32B1_MAT3
24 28
yes
I/O
I; PU
PIO0_9 — General purpose digital input/output pin.
O-
TXD1 — Transmitter output for UART1.
I-
CT32B1_CAP3 — Capture input, channel 3 for 32-bit timer 1.
O-
CT32B1_MAT3 — Match output, channel 3 for 32-bit timer 1.
PIO0_10/SCL
25 37
yes
I/O
I; IA
PIO0_10 — General purpose digital input/output pin.
I/O
-
SCL — I2C-bus clock input/output.
PIO0_11/SDA/
CT16B0_CAP0/
CT16B0_MAT0
26 38
yes
I/O
I; IA
PIO0_11 — General purpose digital input/output pin.
I/O
-
SDA — I2C-bus data input/output.
I-
CT16B0_CAP0 — Capture input, channel 0 for 16-bit timer 0.
O-
CT16B0_MAT0 — Match output, channel 0 for 16-bit timer 0.
PIO0_12/CLKOUT/
CT16B0_CAP1/
CT16B0_MAT1
27 39
no
I/O
I; PU
PIO0_12 — General purpose digital input/output pin. A LOW
level on this pin during reset starts the ISP command handler.
High-current output driver.
O-
CLKOUT — Clock out pin.
I-
CT16B0_CAP1 — Capture input, channel 1 for 16-bit timer 0.
O-
CT16B0_MAT1 — Match output, channel 1 for 16-bit timer 0.
RESET/PIO0_13
28 40
no
I
I; PU
RESET — External reset input: A LOW on this pin resets the
device, causing I/O ports and peripherals to take on their
default states, and processor execution to begin at address 0.
I/O
-
PIO0_13 — General purpose digital input/output pin.
PIO0_14/SCK
29 41
no
I/O
I; PU
PIO0_14 — General purpose digital input/output pin.
I/O
-
SCK — Serial clock for SSP/SPI.
PIO0_15/SSEL/
CT16B1_CAP0/
CT16B1_MAT0
30 42
no
I/O
I; PU
PIO0_15 — General purpose digital input/output pin.
I/O
-
SSEL — Slave select for SSP/SPI.
I-
CT16B1_CAP0 — Capture input, channel 0 for 16-bit timer 1.
O-
CT16B1_MAT0 — Match output, channel 0 for 16-bit timer 1.
PIO0_16/MISO/
CT16B1_CAP1/
CT16B1_MAT1
31 43
no
I/O
I; PU
PIO0_16 — General purpose digital input/output pin.
I/O
-
MISO — Master In Slave Out for SSP/SPI.
I-
CT16B1_CAP1 — Capture input, channel 1 for 16-bit timer 1.
O-
CT16B1_MAT1 — Match output, channel 1 for 16-bit timer 1.
Table 3.
LPC122x pin description …continued
Symbol
Pi
n
LQ
FP4
8
Pi
n
LQ
FP6
4
Start
logic
input
Type Reset
state
[1]
Description
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