参数资料
型号: LPC1346FHN33,551
厂商: NXP Semiconductors
文件页数: 12/77页
文件大小: 0K
描述: MCU 32BIT ARM 48KB FLASH 32HVQFN
标准包装: 260
系列: LPC13xx
核心处理器: ARM? Cortex?-M3
芯体尺寸: 32-位
速度: 72MHz
连通性: I²C,Microwire,SPI,SSI,SSP,UART/USART,USB
外围设备: 欠压检测/复位,POR,WDT
输入/输出数: 26
程序存储器容量: 48KB(48K x 8)
程序存储器类型: 闪存
EEPROM 大小: 4K x 8
RAM 容量: 10K x 8
电压 - 电源 (Vcc/Vdd): 2 V ~ 3.6 V
数据转换器: A/D 8x12b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 32-VQFN 裸露焊盘
包装: 托盘
LPC1315_16_17_45_46_47
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 3 — 20 September 2012
2 of 77
NXP Semiconductors
LPC1315/16/17/45/46/47
32-bit ARM Cortex-M3 microcontroller
Debug options:
Standard JTAG test interface for BSDL.
Serial Wire Debug.
Support for ETM ARM Cortex-M3 debug time stamping.
Digital peripherals:
Up to 51 General Purpose I/O (GPIO) pins with configurable pull-up/pull-down
resistors, repeater mode, input inverter, and pseudo open-drain mode. Eight pins
support programmable glitch filter.
Up to 8 GPIO pins can be selected as edge and level sensitive interrupt sources.
Two GPIO grouped interrupt modules enable an interrupt based on a
programmable pattern of input states of a group of GPIO pins.
High-current source output driver (20 mA) on one pin (P0_7).
High-current sink driver (20 mA) on true open-drain pins (P0_4 and P0_5).
Four general purpose counter/timers with a total of up to 8 capture inputs and 13
match outputs.
Programmable Windowed WatchDog Timer (WWDT) with a internal low-power
WatchDog Oscillator (WDO).
Repetitive Interrupt Timer (RI Timer).
Analog peripherals:
12-bit ADC with eight input channels and sampling rates of up to 500 kSamples/s.
Serial interfaces:
USB 2.0 full-speed device controller (LPC1345/46/47) with on-chip ROM-based
USB driver library.
USART with fractional baud rate generation, internal FIFO, a full modem control
handshake interface, and support for RS-485/9-bit mode and synchronous mode.
USART supports an asynchronous smart card interface (ISO 7816-3).
Two SSP controllers with FIFO and multi-protocol capabilities.
I2C-bus interface supporting the full I2C-bus specification and Fast-mode Plus with
a data rate of up to 1 Mbit/s with multiple address recognition and monitor mode.
Clock generation:
Crystal Oscillator with an operating range of 1 MHz to 25 MHz (system oscillator)
with failure detector.
12 MHz high-frequency Internal RC oscillator (IRC) trimmed to 1 % accuracy over
the entire voltage and temperature range. The IRC can optionally be used as a
system clock.
Internal low-power, low-frequency WatchDog Oscillator (WDO) with programmable
frequency output.
PLL allows CPU operation up to the maximum CPU rate with the system oscillator
or the IRC as clock sources.
A second, dedicated PLL is provided for USB (LPC1345/46/47).
Clock output function with divider that can reflect the crystal oscillator, the main
clock, the IRC, or the watchdog oscillator.
Power control:
Four reduced power modes: Sleep, Deep-sleep, Power-down, and Deep
power-down.
Power profiles residing in boot ROM allow optimized performance and minimized
power consumption for any given application through one simple function call.
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