参数资料
型号: LPC2103FBD48,118
厂商: NXP Semiconductors
文件页数: 5/37页
文件大小: 0K
描述: IC ARM7 MCU FLASH 32K 48-LQFP
标准包装: 2,000
系列: LPC2100
核心处理器: ARM7
芯体尺寸: 16/32-位
速度: 70MHz
连通性: I²C,Microwire,SPI,SSI,SSP,UART/USART
外围设备: POR,PWM,WDT
输入/输出数: 32
程序存储器容量: 32KB(32K x 8)
程序存储器类型: 闪存
RAM 容量: 8K x 8
电压 - 电源 (Vcc/Vdd): 1.65 V ~ 3.6 V
数据转换器: A/D 8x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 48-LQFP
包装: 带卷 (TR)
配用: 568-4302-ND - BOARD EVAL LPC210X KS2103 JLINK
568-4301-ND - BOARD EVAL LPC210X KS2103
568-4300-ND - BOARD EVAL LPC210X MCB2103
568-4297-ND - BOARD EVAL LPC21XX MCB2100
MCB2103UME-ND - BOARD EVAL MCB2103 + ULINK-ME
MCB2103U-ND - BOARD EVAL MCB2103 + ULINK2
622-1013-ND - BOARD FOR LPC2103 48-LQFP
622-1008-ND - BOARD FOR LPC9103 10-HVSON
其它名称: 935280966118
LPC2103FBD48-T
LPC2103FBD48-T-ND
LPC2101_02_03_4
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 04 — 2 June 2009
13 of 37
NXP Semiconductors
LPC2101/02/03
Single-chip 16-bit/32-bit microcontrollers
6.7 Fast general purpose parallel I/O
Device pins that are not connected to a specic peripheral function are controlled by the
GPIO registers. Pins may be dynamically congured as inputs or outputs. Separate
registers allow setting or clearing any number of outputs simultaneously. The value of the
output register may be read back, as well as the current state of the port pins.
LPC2101/02/03 introduce accelerated GPIO functions over prior LPC2000 devices:
GPIO registers are relocated to the ARM local bus for the fastest possible I/O timing.
Mask registers allow treating sets of port bits as a group, leaving other bits
unchanged.
All GPIO registers are byte addressable.
Entire port value can be written in one instruction.
6.7.1 Features
Bit-level set and clear registers allow a single instruction set or clear of any number of
bits in one port.
Direction control of individual bits.
Separate control of output set and clear.
All I/O default to inputs after reset.
6.8 10-bit ADC
The LPC2101/02/03 contain one ADC. It is a single 10-bit successive approximation ADC
with eight channels.
6.8.1 Features
Measurement range of 0 V to 3.3 V.
Each converter capable of performing more than 400,000 10-bit samples per second.
Burst conversion mode for single or multiple inputs.
Optional conversion on transition on input pin or Timer Match signal.
Every analog input has a dedicated result register to reduce interrupt overhead.
6.9 UARTs
The LPC2101/02/03 each contain two UARTs. In addition to standard transmit and
receive data lines, UART1 also provides a full modem control handshake interface.
Compared to previous LPC2000 microcontrollers, UARTs in LPC2101/02/03 include a
fractional baud rate generator for both UARTs. Standard baud rates such as 115200 can
be achieved with any crystal frequency above 2 MHz.
6.9.1 Features
16 byte Receive and Transmit FIFOs.
Register locations conform to 16C550 industry standard.
Receiver FIFO trigger points at 1, 4, 8, and 14 bytes
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