参数资料
型号: LSN2-T/22-D12NB-C
厂商: MURATA POWER SOLUTIONS INC
元件分类: 电源模块
英文描述: DC-DC REG PWR SUPPLY MODULE
封装: ROHS COMPLIANT, SIP-9
文件页数: 8/13页
文件大小: 1173K
代理商: LSN2-T/22-D12NB-C
LSN2-T/22-D12
Non-isolated, DOSA-SIP,
22A Selectable-Output DC/DC Converters
Technical enquiries email: sales@murata-ps.com, tel: +1 508 339 3000
www.murata-ps.com
Figure 1. LSN2 Series Simplified Schematic
MDC_LSN2-T/22-D12_B02 Page 4 of 13
Performance/Functional Specification Notes:
(7)
If Sense is connected remotely at the load, up to 0.5 Volts difference is allowed between the
Sense and +VOUT pins to compensate for ohmic voltage drop in the power lines. A larger voltage
drop may cause the converter to exceed maximum power dissipation.
(8)
Output noise may be further reduced by adding an external filter. See I/O Filtering and Noise
Reduction.
(9)
All models are fully operational and meet published specifications, including “cold start” at
–40°C. The package temperature of all on-board components must not exceed +128°C.
(10)
Regulation specifications describe the deviation as the line input voltage or output load current is
varied from a nominal midpoint value to either extreme.
(11)
Other input or output voltage ranges are available under scheduled quantity special order.
(12)
Maximum PC board temperature is measured with the sensor in the center.
(13)
Do not exceed maximum power specifications when adjusting the output trim.
I/O Filtering and Noise Reduction
All models in the LSN2 Series are tested and specified with external
1 || 10F ceramic/tantalum output capacitors and a 22F tantalum input
capacitor. These capacitors are necessary to accommodate our test equip-
ment and may not be required to achieve desired performance in your appli-
cation. The LSN2's are designed with high-quality, high-performance internal
I/O caps, and will operate within spec in most applications with no additional
external components.
In particular, the LSN2's input capacitors are specified for low ESR and are
fully rated to handle the units' input ripple currents. Similarly, the internal
output capacitors are specified for low ESR and full-range frequency response.
TECHNICAL NOTES
(14)
When Sequencing is not used, the Power Good output is TRUE at any time the output is within
approximately ±10% of the voltage set point. Power Good basically indicates if the converter is
in regulation. Power Good detects Over Temperature if the PWM has shut down due to OT. Power
Good does not directly detect Over Current.
If Sequencing is in progress, Power Good will falsely indicate TRUE (valid) before the output
reaches its setpoint. Ignore Power Good if Sequencing is in transition.
(15)
The maximum output capacitive loads depend on the the Equivalent Series Resistance (ESR) of
the external output capacitor. Use only as much output fitering as needed and no more. Low ESR
ceramic caps may degrade dynamic performance. Thoroughly test your system under full load
with all components installed.
(16)
Do not use Pre-bias startup and sequencing together. See Technical Notes below.
(17)
After short circuit shutdown, if the load is partially removed such that the load still exceeds the
overcurrent (OC) detection, the converter will remain in hiccup restart mode.
(18)
For best noise performance, leave the Track/Sequence pin OPEN when not used.
In critical applications, input/output ripple/noise may be further reduced using
filtering techniques, the simplest being the installation of external I/O caps.
External input capacitors serve primarily as energy-storage devices. They
minimize high-frequency variations in input voltage (usually caused by IR
drops in conductors leading to the DC/DC) as the switching converter draws
pulses of current. Input capacitors should be selected for bulk capacitance
(at appropriate frequencies), low ESR, and high rms-ripple-current ratings.
The switching nature of modern DC/DC's requires that the dc input voltage
source have low ac impedance at the frequencies of interest. Highly inductive
source impedances can greatly affect system stability. Your specific system
configuration may necessitate additional considerations.
Only one phase of two is shown.
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