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| 型号： | LT1016IN8#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 17/20页 |
| 文件大小： | 0K |
| 描述： | IC COMPARATOR 10NS HI-SPEED 8DIP |
| 标准包装： | 50 |
| 系列： | UltraFast™ |
| 类型： | 带锁销 |
| 元件数： | 1 |
| 输出类型： | CMOS，补充型，TTL |
| 电压 - 输入偏移（最小值）： | 3mV @ ±5V |
| 电流 - 输入偏压（最小值）： | 10µA @ ±5V |
| 电流 - 输出（标准）： | 20mA |
| 电流 - 静态（最大值）： | 35mA |
| CMRR, PSRR（标准）： | 96dB CMRR，75dB PSRR |
| 传输延迟（最大）： | 14ns |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-DIP（0.300"，7.62mm） |
| 安装类型： | 通孔 |
| 包装： | 管件 |
LT1016
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applicaTions inForMaTion
Common Mode Considerations
The LT1016 is specified for a common mode range of
–3.75V to 3.5V with supply voltages of ±5V. A more
general consideration is that the common mode range
is 1.25V above the negative supply and 1.5V below the
positive supply, independent of the actual supply voltage.
The criteria for common mode limit is that the output still
responds correctly to a small differential input signal.
Either input may be outside the common mode limit (up
to the supply voltage) as long as the remaining input is
within the specified limit, and the output will still respond
correctly. There is one consideration, however, for inputs
that exceed the positive common mode limit. Propagation
delay will be increased by up to 10ns if the signal input
is more positive than the upper common mode limit and
then switches back to within the common mode range.
This effect is not seen for signals more negative than the
lower common mode limit.
Input Impedance and Bias Current
Input bias current is measured with the output held at
1.4V. As with any simple NPN differential input stage, the
LT1016 bias current will go to zero on an input that is low
and double on an input that is high. If both inputs are less
than 0.8V above V–, both input bias currents will go to
zero. If either input exceeds the positive common mode
limit, input bias current will increase rapidly, approaching
several milliamperes at VIN = V+.
Differential input resistance at zero differential input
voltage is about 10k, rapidly increasing as larger DC
differential input signals are applied. Common mode
input resistance is about 4M with zero differential input
voltage. With large differential input signals, the high input
will have an input resistance of about 2M and the low
input greater than 20M.
Input capacitance is typically 3.5pF. This is measured by
inserting a 1k resistor in series with the input and measur-
ing the resultant change in propagation delay.
LATCH Pin Dynamics
The LATCH pin is intended to retain input data (output
latched) when the LATCH pin goes high. This pin will
float to a high state when disconnected, so a flowthrough
condition requires that the LATCH pin be grounded. To
guarantee data retention, the input signal must be valid at
least 5ns before the latch goes high (setup time) and must
remain valid at least 3ns after the latch goes high (hold
time). When the latch goes low, new data will appear at
the output in approximately 8ns to 10ns. The LATCH pin
is designed to be driven with TTL or CMOS gates. It has
no built-in hysteresis.
Measuring Response Time
The LT1016 is able to respond quickly to fast low level
signals because it has a very high gain-bandwidth prod-
uct (≈50GHz), even at very high frequencies. To properly
measure the response of the LT1016 requires an input
signal source with very fast rise times and exceptionally
cleansettlingcharacteristics.Thislastrequirementcomes
about because the standard comparator test calls for an
input step size that is large compared to the overdrive
amplitude. Typical test conditions are 100mV step size
with only 5mV overdrive. This requires an input signal
that settles to within 1% (1mV) of final value in only a few
nanoseconds with no ringing or “long tailing.” Ordinary
high speed pulse generators are not capable of generating
such a signal, and in any case, no ordinary oscilloscope
is capable of displaying the waveform to check its fidelity.
Some means must be used to inherently generate a fast,
clean edge with known final value.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LT1016IS8 | 功能描述:IC COMPARATOR 10NS HI-SPD 8-SOIC RoHS:否 类别:集成电路 (IC) >> 线性 - 比较器 系列:UltraFast™ 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 类型:通用 元件数:1 输出类型:CMOS，推挽式，满摆幅，TTL 电压 - 电源，单路/双路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 电压 - 输入偏移（最小值）:5mV @ 5.5V 电流 - 输入偏压（最小值）:1pA @ 5.5V 电流 - 输出（标准）:- 电流 - 静态（最大值）:24µA CMRR, PSRR（标准）:80dB CMRR，80dB PSRR 传输延迟（最大）:450ns 磁滞:±3mV 工作温度:-40°C ~ 85°C 封装/外壳:6-WFBGA，CSPBGA 安装类型:表面贴装 包装:管件 其它名称:Q3554586 |
| LT1016IS8#PBF | 功能描述:IC COMPARATOR 10NS HI-SPD 8-SOIC RoHS:是 类别:集成电路 (IC) >> 线性 - 比较器 系列:UltraFast™ 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:50 系列:- 类型:带电压基准 元件数:4 输出类型:开路漏极 电压 - 电源，单路/双路(±):2.5 V ~ 11 V，±1.25 V ~ 5.5 V 电压 - 输入偏移（最小值）:10mV @ 5V 电流 - 输入偏压（最小值）:- 电流 - 输出（标准）:0.015mA @ 5V 电流 - 静态（最大值）:8.5µA CMRR, PSRR（标准）:80dB CMRR，80dB PSRR 传输延迟（最大）:- 磁滞:- 工作温度:0°C ~ 70°C 封装/外壳:16-SOIC（0.154"，3.90mm 宽） 安装类型:表面贴装 包装:管件 产品目录页面:1386 (CN2011-ZH PDF) |
| LT1016IS8#TR | 功能描述:IC COMPARATOR 10NS HI SPD 8SOIC RoHS:否 类别:集成电路 (IC) >> 线性 - 比较器 系列:UltraFast™ 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 类型:通用 元件数:1 输出类型:CMOS，推挽式，满摆幅，TTL 电压 - 电源，单路/双路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 电压 - 输入偏移（最小值）:5mV @ 5.5V 电流 - 输入偏压（最小值）:1pA @ 5.5V 电流 - 输出（标准）:- 电流 - 静态（最大值）:24µA CMRR, PSRR（标准）:80dB CMRR，80dB PSRR 传输延迟（最大）:450ns 磁滞:±3mV 工作温度:-40°C ~ 85°C 封装/外壳:6-WFBGA，CSPBGA 安装类型:表面贴装 包装:管件 其它名称:Q3554586 |
| LT1016IS8#TRPBF | 功能描述:IC COMPARATOR 10NS HI-SPD 8-SOIC RoHS:是 类别:集成电路 (IC) >> 线性 - 比较器 系列:UltraFast™ 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:- 类型:通用 元件数:1 输出类型:CMOS，推挽式，满摆幅，TTL 电压 - 电源，单路/双路(±):2.5 V ~ 5.5 V，±1.25 V ~ 2.75 V 电压 - 输入偏移（最小值）:5mV @ 5.5V 电流 - 输入偏压（最小值）:1pA @ 5.5V 电流 - 输出（标准）:- 电流 - 静态（最大值）:24µA CMRR, PSRR（标准）:80dB CMRR，80dB PSRR 传输延迟（最大）:450ns 磁滞:±3mV 工作温度:-40°C ~ 85°C 封装/外壳:6-WFBGA，CSPBGA 安装类型:表面贴装 包装:管件 其它名称:Q3554586 |
| LT1016IS8PBF | 制造商:Linear Technology 功能描述:Comparator Single +/-5V/10V SOIC8 |
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