参数资料
| 型号： | LT1056S8#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 12/16页 |
| 文件大小： | 0K |
| 描述： | IC PREC OP-AMP JFET HI-SPD 8SOIC |
| 标准包装： | 100 |
| 放大器类型： | J-FET |
| 电路数： | 1 |
| 转换速率： | 14 V/µs |
| 增益带宽积： | 5.5MHz |
| 电流 - 输入偏压： | 30pA |
| 电压 - 输入偏移： | 500µV |
| 电流 - 电源： | 5mA |
| 电压 - 电源，单路/双路(±)： | ±5 V ~ 18 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SO |
| 包装： | 管件 |
| 产品目录页面： | 1317 (CN2011-ZH PDF) |
5
LT1055/LT1056
10556fc
For MIL-STD components, please refer to LTC883 data sheet for test
listing and parameters.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Offset voltage is measured under two different conditions:
(a) approximately 0.5 seconds after application of power; (b) at TA = 25°C
only, with the chip heated to approximately 38
°C for the LT1055 and to
45
°C for the LT1056, to account for chip temperature rise when the device
is fully warmed up.
Note 3: 10Hz noise voltage density is sample tested on every lot of A
grades. Devices 100% tested at 10Hz are available on request.
Note 4: This parameter is tested on a sample basis only.
Note 5: Current noise is calculated from the formula: in = (2qlB)1/2, where
q = 1.6 10–19 coulomb. The noise of source resistors up to 1G
swamps
the contribution of current noise.
Note 6: Offset voltage drift with temperature is practically unchanged
when the offset voltage is trimmed to zero with a 100k potentiometer
between the balance terminals and the wiper tied to V+. Devices tested to
tighter drift specifications are available on request.
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the temperature range
0
°C ≤ TA ≤ 70°C. VS = ±15V, VCM = 0V, unless otherwise noted.
LT1055CS8/LT1056CS8
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VOS
Input Offset Voltage (Note 2)
●
800
2200
V
Average Temperature Coefficient of Input Offset Voltage
●
415
V/°C
IOS
Input Offset Current
Warmed Up, TA = 70°C
●
18
150
pA
IB
Input Bias Current
Warmed Up, TA = 70°C
●
±60
±400
pA
AVOL
Large-Signal Voltage Gain
VO = ±10V, RL = 2k
●
60
250
V/mV
CMRR
Common Mode Rejection Ratio
VCM = ±10.5V
●
82
98
dB
PSRR
Power Supply Rejection Ratio
VS = ±10V to ±18V
●
87
103
dB
VOUT
Output Voltage Swing
RL = 2K
●
±12
±13.1
V
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