参数资料
型号: LT1301CS8#TRPBF
厂商: Linear Technology
文件页数: 5/12页
文件大小: 0K
描述: IC REG BOOST 5V/12V 8SOIC
标准包装: 2,500
类型: 升压(升压)
输出类型: 固定
输出数: 1
输出电压: 5V,12V
输入电压: 1.8 V ~ 10 V
PWM 型: Burst Mode?
同步整流器:
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
包装: 带卷 (TR)
供应商设备封装: 8-SOIC
LT1301
TEST CIRCUITS
2V
V IN
I L
5V
100 ?
100 μ F
SEL
SENSE
GND
LT1301
SW
SHDN
PGND
f OUT
OPERATIO N
Oscillator Test Circuit
LT1301 TC
Operation of the LT1301 is best understood by referring to
the Block Diagram in Figure 2. When A1’s negative input,
related to the Sense pin voltage by the appropriate resis-
tor-divider ratio is higher that the 1.25V reference voltage,
A1’s output is low. A2, A3 and the oscillator are turned off,
drawing no current. Only the reference and A1 consume
current, typically 120 μ A. When A1’s negative input drops
below 1.25V, overcoming A1’s 6mV hysteresis, A1’s out-
put goes high enabling the oscillator, current comparator
A2, and driver A3. Quiescent current increases to 2mA as
the device prepares for high current switching. Q1 then
turns on in controlled saturation for (nominally) 5.3 μ s or
until comparator A2 trips, whichever comes first. After a
fixed off-time of (nominally) 1.2 μ s, Q1 turns on again. The
LT1301’s switching causes current to alternately build up
in L1 and dump into output capacitor C2 via D1, increasing
the output voltage. When the output is high enough to
cause A1’s output to go to low, switching action ceases.
C2 is left to supply current to the load until V OUT decreases
enough to force A1’s output high, and the entire cycle
repeats. Figure 4 details relevant waveforms. A1’s cycling
causes low-to-mid-frequency ripple voltage on the output.
Ripple can be reduced by making the output capacitor
large. The 33 μ F unit specified results in ripple of 100mV to
200mV on the 12V output. A 100 μ F capacitor will decrease
ripple to 50mV. If operating at 5V ouput a 0.1 μ F ceramic
capacitor is required at the Sense pin in addition to the
electrolytic.
If switch current reaches 1A, causing A2 to trip, switch on-
the voltage across 3 ? resistor R1 which is directly related
to the switch current. Q2’s collector current is set by the
emitter-area ratio to 0.6% of Q1’s collector current. When
R1’s voltage drop exceeds 18mV, corresponding to 1A
switch current, A2’s output goes high, truncating the on-
time portion of the oscillator cycle and increasing off-time
to about 2 μ s as shown in Figure 3, trace A. This pro-
grammed peak current can be reduced by tying the I LIM pin
to ground, causing 15 μ A to flow through R2 into Q3’s
collector. Q3’s current causes a 10.4mV drop in R2 so that
only an additional 7.6mV is required across R1 to turn off
the switch. This corresponds to a 400mA switch current
as shown in Figure 3, trace B. The reduced peak switch
current reduces I 2 R loses in Q1, L1, C1 and D1. Efficiency
can be increased by doing this provided that the accom-
panying reduction in full load current is acceptable. Lower
peak currents also extend alkaline battery life due to the
alkaline cell’s high internal impedance.
TRACE A
500mA/DIV
I LIM PIN
OPEN
TRACE B
500mA/DIV
I LIM PIN
GROUNDED
20 μ s/DIV
Figure 3. Switch Pin Current With I LIM Floating or Grounded
time is reduced and off-time increases slightly. This allows
continuous mode operation during bursts. A2 monitors
5
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