参数资料
型号: LT1373HVCS8#TRPBF
厂商: Linear Technology
文件页数: 6/12页
文件大小: 0K
描述: IC REG MULTI CONFIG ADJ 8SOIC
标准包装: 2,500
类型: 降压(降压),升压(升压),反相,Cuk,回扫,正向转换器
输出类型: 可调式
输出数: 1
输出电压: 1.25 V ~ 42 V
输入电压: 2.7 V ~ 25 V
PWM 型: 电流模式
频率 - 开关: 250kHz
电流 - 输出: 1.5A
同步整流器:
工作温度: 0°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
包装: 带卷 (TR)
供应商设备封装: 8-SOIC
LT1373
OPERATIO
The LT1373 is a current mode switcher. This means that
switch duty cycle is directly controlled by switch current
rather than by output voltage. Referring to the Block
Diagram, the switch is turned “On” at the start of each
oscillator cycle. It is turned “Off” when switch current
reaches a predetermined level. Control of output voltage
is obtained by using the output of a voltage sensing error
amplifier to set current trip level. This technique has
several advantages. First, it has immediate response to
input voltage variations, unlike voltage mode switchers
which have notoriously poor line transient response.
Second, it reduces the 90 ° phase shift at mid-frequencies
in the energy storage inductor. This greatly simplifies
closed-loop frequency compensation under widely vary-
ing input voltage or output load conditions. Finally, it
allows simple pulse-by-pulse current limiting to provide
maximum switch protection under output overload or
short conditions. A low dropout internal regulator pro-
vides a 2.3V supply for all internal circuitry. This low
dropout design allows input voltage to vary from 2.7V to
25V with virtually no change in device performance. A
250kHz oscillator is the basic clock for all internal timing.
It turns “On” the output switch via the logic and driver
circuitry. Special adaptive anti-sat circuitry detects onset
of saturation in the power switch and adjusts driver
current instantaneously to limit switch saturation. This
minimizes driver dissipation and provides very rapid
turn-off of the switch.
A 1.245V bandgap reference biases the positive input of
the error amplifier. The negative input of the amplifier is
brought out for positive output voltage sensing. The error
amplifier has nonlinear transconductance to reduce out-
APPLICATIO S I FOR ATIO
Positive Output Voltage Setting
put overshoot on start-up or overload recovery. When
the feedback voltage exceeds the reference by 40mV,
error amplifier transconductance increases ten times,
which reduces output overshoot. The feedback input also
invokes oscillator frequency shifting, which helps pro-
tect components during overload conditions. When the
feedback voltage drops below 0.6V, the oscillator fre-
quency is reduced 5:1. Lower switching frequency allows
full control of switch current limit by reducing minimum
switch duty cycle.
Unique error amplifier circuitry allows the LT1373 to
directly regulate negative output voltages. The negative
feedback amplifier’s 400k source resistor is brought out
for negative output voltage sensing. The NFB pin regulates
at – 2.45V while the amplifier output internally drives the
FB pin to 1.245V. This architecture, which uses the same
main error amplifier, prevents duplicating functions and
maintains ease of use. (Consult Linear Technology Mar-
keting for units that can regulate down to – 1.25V.)
The error signal developed at the amplifier output is
brought out externally. This pin (V C ) has three different
functions. It is used for frequency compensation, current
limit adjustment and soft starting. During normal regula-
tor operation this pin sits at a voltage between 1V (low
output current) and 1.9V (high output current). The error
amplifier is a current output (g m ) type, so this voltage can
be externally clamped for lowering current limit. Like-
wise, a capacitor coupled external clamp will provide soft
start. Switch duty cycle goes to zero if the V C pin is pulled
below the control pin threshold, placing the LT1373 in an
idle mode.
( )
V OUT = V REF 1 + R1
( )
V OUT
TheLT1373developsa1.245Vreference(V REF )fromthe
FB pin to ground. Output voltage is set by connecting the
FB pin to an output resistor divider (Figure 1). The FB pin
bias current represents a small error and can usually be
ignored for values of R2 up to 25k. The suggested value for
FB
PIN
V REF
V OUT
R1
R2
R2
R1 = R2 –1
1.245
LT1373 ? F01
R2 is 24.9k. The NFB pin is normally left open for positive
output applications.
6
Figure 1. Positive Output Resistor Divider
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