参数资料
型号: LT1374IS8-SYNC#TRPBF
厂商: LINEAR TECHNOLOGY CORP
元件分类: 稳压器
英文描述: 8.5 A SWITCHING REGULATOR, 560 kHz SWITCHING FREQ-MAX, PDSO8
封装: 0.150 INCH, PLASTIC, SO-8
文件页数: 32/32页
文件大小: 698K
代理商: LT1374IS8-SYNC#TRPBF
9
LT1374
1374fd
More Than Just Voltage Feedback
The feedback pin is used for more than just output voltage
sensing. It also reduces switching frequency and current
limit when output voltage is very low (see the Frequency
Foldback graph in Typical Performance Characteristics).
This is done to control power dissipation in both the IC and
in the external diode and inductor during short-circuit
conditions. A shorted output requires the switching regu-
lator to operate at very low duty cycles, and the average
current through the diode and inductor is equal to the
short-circuit current limit of the switch (typically 6A for the
LT1374, folding back to less than 3A). Minimum switch on
time limitations would prevent the switcher from attaining
a sufficiently low duty cycle if switching frequency were
maintained at 500kHz, so frequency is reduced by about
5:1 when the feedback pin voltage drops below 1V (see
Frequency Foldback graph). This does not affect operation
with normal load conditions; one simply sees a gear shift
in switching frequency during start-up as the output
voltage rises.
In addition to lower switching frequency, the LT1374 also
operates at lower switch current limit when the feedback
pin voltage drops below 1.7V. Q2 in Figure 2 performs this
function by clamping the VC pin to a voltage less than its
normal 2.1V upper clamp level. This
foldback current limit
greatly reduces power dissipation in the IC, diode and
inductor during short-circuit conditions. External synchro-
nization is also disabled to prevent interference with
APPLICATIONS INFORMATION
WU
U
Figure 2. Frequency and Current Limit Foldback
+
2.4V
VSW
VC
GND
TO SYNC CIRCUIT
1374 F02
TO FREQUENCY
SHIFTING
R3
1k
R4
1k
R1
R2
5k
OUTPUT
5V
R5
5k
ERROR
AMPLIFIER
FB
1.6V
Q1
LT1374
Q2
+
foldback operation. Again, it is nearly transparent to the
user under normal load conditions. The only loads that may
be affected are current source loads which maintain full
load current with output voltage less than 50% of final value.
In these rare situations the feedback pin can be clamped
above 1.5V with an external diode to defeat foldback cur-
rent limit.
Caution: clamping the feedback pin means that
frequency shifting will also be defeated, so a combination
of high input voltage and dead shorted output may cause
the LT1374 to lose control of current limit.
The internal circuitry which forces reduced switching
frequency also causes current to flow out of the feedback
pin when output voltage is low. The equivalent circuitry is
shown in Figure 2. Q1 is completely off during normal
operation. If the FB pin falls below 1V, Q1 begins to
conduct current and reduces frequency at the rate of
approximately 5kHz/A. To ensure adequate frequency
foldback (under worst-case short-circuit conditions), the
external divider Thevinin resistance must be low enough
to pull 150A out of the FB pin with 0.6V on the pin (RDIV
≤ 4k). The net result is that reductions in frequency and
current limit are affected by output voltage divider imped-
ance. Although divider impedance is not critical, caution
should be used if resistors are increased beyond the
suggested values and short-circuit conditions will occur
with high input voltage. High frequency pickup will
increase and the protection accorded by frequency and
current foldback will decrease.
相关PDF资料
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LT1374IR#TR 8.5 A SWITCHING REGULATOR, 560 kHz SWITCHING FREQ-MAX, PSSO7
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LT1374IS8-SYNC#TR 8.5 A SWITCHING REGULATOR, 560 kHz SWITCHING FREQ-MAX, PDSO8
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