参数资料
型号: LT1573CS8-3.3
厂商: LINEAR TECHNOLOGY CORP
元件分类: 基准电压源/电流源
英文描述: Low Dropout PNP Regulator Driver
中文描述: 3.3 V FIXED POSITIVE LDO REGULATOR, PDSO8
封装: 0.150 INCH, PLASTIC, SO-8
文件页数: 6/16页
文件大小: 200K
代理商: LT1573CS8-3.3
6
LT1573
+
+
+
+
+
V
SHDNTH
+
I
3
I
LATCH
+
I
2
V
IN
6
V
IN
SHDN
GND
COMP
8
ERROR
AMP
V
OUT
7
I
DISCHRG
LATCH
DRIVE
NORMALLY
OFF
NORMALLY
ON
NORMALLY
OFF
NORMALLY
OFF
EXTERNAL
CAPACITOR
C
EXT
C1
C2
C4
C3
Q4
+
I
CHRG
V
DRSAT
V
IODTH
V
LATCHTH
+
+
+
THERMAL
SHUTDOWN
FB
1
GND
1573 BD
R1
R2
FOR FIXED
VOLTAGE
VERSION
1.265V
5
2
6
3
4
4
Q5
Q3
Q1
Q2
S3
S4
S2
S1
The basic block diagram of the LT1573 is shown above.
The regulating loop consists of a 1.265V reference, an
error amplifier, a Darlington driver and an external PNP
pass transistor. The 1.265V reference feeds the noninvert-
ing input of the error amplifier. The error amplifier drives
the Darlington connected transistor pair Q1 and Q2. The
collector of Q1 comes out to the DRIVE pin and is used to
drive the base of an external PNP power transistor as
shown in Figure 1. The error amplifier will adjust the drive
current to the external PNP power transistor to maintain
the feedback pin voltage at 1.265V. The LT1573 provides
overcurrent protection by means of a timed latch function.
Base current to the external PNP transistor is limited by
placing a resistor between the base of the transistor and
the DRIVE pin. When the DRIVE pin drops below V
DRSAT
(the DRIVE pin saturation voltage) the output of the
comparator C2 switches high; S1, which is normally
closed, opens and the external capacitor connected to the
LATCH pin is allowed to charge. Discharge current I
DISCHRG
is equal to approximately 28
μ
A and charging current I
CHRG
is equal to approximately 7
μ
A. If the fault condition goes
away before C
EXT
charges to the latch threshold, C2 will
switch back low, S1 will close and Q4 will discharge C
EXT
.
If the fault condition persists long enough for C
EXT
to
charge up to the latch threshold (V
LATCHTH
), comparator
C4 will switch high and S4 will close and latch the output
off. The device will stay latched because latching current
I
LATCH
is greater than the pull-down current of Q4. Thermal
shutdown circuitry will close S4 and latch the device off
with no timing delay. Comparator C1 is used to override
the latching function during start-up. If the difference
between the output voltage and the input voltage is less
than the input-output differential threshold (V
IODTH
),
comparator C1 output goes high which closes S2. Current
source I
2
then drives base of Q4 which prevents C
EXT
from
charging. Comparator C3 is used for system shutdown
and latch reset. If SHDN pin voltage is higher than shut-
down threshold V
SDTH
, the comparator C3 output goes
high, shutting down the regulator and closing switch S3.
Current I
3
will drive Q4 to discharge C
EXT
, resetting the
latch.
BLOCK DIAGRA
FU
U
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