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| 型号： | LT1581CT7#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 8/12页 |
| 文件大小： | 0K |
| 描述： | IC LDO REGULATOR 10A ADJ TO220-7 |
| 产品培训模块： | More Information on LDOs |
| 标准包装： | 50 |
| 应用： | 转换器，Intel Pentium? |
| 输入电压： | 1.68 V ~ 6 V |
| 输出数： | 1 |
| 输出电压： | 1.25 V ~ 4.65 V |
| 工作温度： | 0°C ~ 125°C |
| 安装类型： | 通孔 |
| 封装/外壳： | TO-220-7 成形引线 |
| 供应商设备封装： | TO-220-7 |
| 包装： | 管件 |
| 产品目录页面： | 1328 (CN2011-ZH PDF) |
LT1581/LT1581-2.5
APPLICATIO N S I N FOR M ATIO N
network must handle until the regulator throttles to the
V CONTROL
load current level. Capacitors are not ideal elements and
contain parasitic resistance and inductance. These para-
sitic elements dominate the change in output voltage at
the beginning of a transient load step change. The ESR of
V POWER
+
+
POWER
CONTROL
OUTPUT
+
V OUT
the output capacitors produces an instantaneous step in
output voltage ( ? V = ? I)(ESR). The ESL of the output
LT1581
SENSE
capacitors produces a droop proportional to the rate of
change of the output current (V = L)( ? I/ ? t). The output
ADJ
V REF
R1
( )
V OUT = V REF 1 + + I ADJ (R2)
capacitance produces a change in output voltage
proportional to the time until the regulator can respond
( ? V = ? t)( ? I/C). These transient effects are illustrated in
R2
R1
I ADJ = 60 μ A
R2
1581 F05
Figure 4 .
ESR
Figure 5. Setting Output Voltage
minimum load current of 10mA. The current out of the
EFFECTS
ESL
EFFECTS
CAPACITANCE
EFFECTS
ADJUST pin adds to the current from R1. The ADJUST pin
current is small, typically 60 μ A. The output voltage contri-
bution of the ADJUST pin current is small and only needs
SLOPE,
V
t
= ? I
C
POINT AT WHICH REGULATOR
TAKES CONTROL
1581 F04
to be considered when very precise output voltage setting
is required. Note that the top of the resistor divider should
Figure 4
The use of capacitors with low ESR, low ESL and good
high frequency characteristics is critical in meeting the
output voltage tolerances of these high speed micropro-
cessors. These requirements dictate a combination of
high quality, surface mount, tantalum and ceramic capaci-
tors. The location of the decoupling network is critical to
transient performance. Place the decoupling network as
close to the processor pins as possible because trace runs
from the decoupling capacitors to the processor pins are
inductive. The ideal location for the decoupling network is
actually inside the microprocessor socket cavity. In addi-
tion, use large power and ground plane areas to minimize
distribution drops.
Output Voltage
The adjustable version of the LT1581 develops a 1.25V
reference voltage between the SENSE pin and the ADJUST
pin (see Figure 5). Placing a resistor R1 between these two
terminals causes a constant current to flow through R1
and down through R2 to set the overall output voltage.
Normally, R1 is chosen so that this current is the specified
8
be connected directly to the SENSE pin for best regulation.
See the section on grounding and Kelvin sensing above.
Protection Diodes
In normal operation the LT1581 does not require protec-
tion diodes. Older 3-terminal regulators require protection
diodes between the OUTPUT pin and the INPUT pin or
between the ADJUST pin and the OUTPUT pin to prevent
die overstress.
On the LT1581, internal resistors limit internal current
paths on the ADJUST pin. Therefore even with bypass
capacitors on the ADJUST pin, no protection diode is
needed to ensure device safety under short-circuit con-
ditions. The ADJUST pin can be driven on a transient
basis ± 7V with respect to the output without any device
degradation.
A protection diode between the OUTPUT pin and the
V POWER pin is usually not needed. An internal diode
between the OUTPUT pin and the V POWER pin on the
LT1581 can handle microsecond surge currents of 50A to
100A. Even with large value output capacitors it is difficult
to obtain those values of surge currents in normal opera-
tion. Only with large values of output capacitance, such as
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