参数资料
型号: LT1619EMS8
厂商: Linear Technology
文件页数: 10/20页
文件大小: 0K
描述: IC REG CTRLR PWM CM 8-MSOP
标准包装: 50
PWM 型: 电流模式
输出数: 1
频率 - 最大: 500kHz
占空比: 92%
电源电压: 1.9 V ~ 18 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 8-TSSOP,8-MSOP(0.118",3.00mm 宽)
包装: 管件
LT1619
APPLICATIO S I FOR ATIO
f CORNER =
≈ 5 f S
( )
I S/S
≈ –2 μ A
1
2 π R OS C S
(The input impedance of the sense amplifier at the SENSE
pin is 2500 ? and R OS is typically less than 137 ? .) Typical
values for R OS and C S are 100 ? and 1nF. The 100 ? value
for R OS reduces Burst Mode threshold; use 10 ? and 10nF
V IN
V Z
R3
I S/S
1
2
3
4
S/S V IN
FB DRV
LT1619
V C GATE
GND SENSE
8
7
6
5
R3 < SHUTDOWN THRESHOLD
V S/S = 0
UVLO THRESHOLD = V Z + SHUTDOWN
THRESHOLD ≈ V Z + V BE
I S/S
V S/S = 0
when this is not desireable.
1619 F07
Figure 7. Implementing Undervoltage Lockout
PWM
LT1619
CURRENT
I D
COMPARATOR
SENSE
AMPLIFIER
+
5
4
SENSE
GND
R OS
C S R SENSE
+
V SENSE
I
+
V
I
ZENER
DIODE
AVALANCHE
DIODE
1619 F06
V
Figure 6. Current Sense Filter for Improving Jitter Performance
0
BV < 5V
Figure 8. I-V Characteristics of Zener
Use of Shutdown Function to
Modify Undervoltage Lockout
The LT1619 is designed to operate from an input supply
with voltage as low as 1.85V. Shutdown is activated when
and Avalanche Breakdown Diodes
V IN
R4
the S/S pin is pulled below 0.45V. The shutdown threshold
1
S/S
V IN
8
is slightly greater than one junction diode forward voltage
and has the temperature characteristics of a junction
diode. The S/S pin is normally tied to the input when
operating from a low voltage input source.
Consider the 12V to – 65V isolated flyback converter (see
C1
R3
2
3
4
FB DRV
LT1619
V C GATE
GND SENSE
1619 F09
7
6
5
Typical Applications). The converter draws 3A at low line
while delivering 0.4A to the output. If the S/S pin is tied to
the input, then the LT1619 will start switching as soon as
V IN exceeds the internal UVLO threshold. With full load,
the converter can draw much higher than the steady-state
3A from the input source during start-up. If the input
source is current limited, the input voltage will collapse
and latch low.
The start-up problem can be prevented by adding a zener
diode and a resistor to the S/S pin (Figure 7). This is
equivalent to increasing undervoltage lockout voltage of
the controller. Before V IN exceeds the zener voltage V Z , the
S/S pin current is shunted to the ground through the
Figure 9. Filtering Input Voltage Ripple in UVLO Circuit
resistor R3. The voltage developed across R3 due to I S/S
should be less than the shutdown threshold. The LT1619
remains off until V IN exceeds the sum of V Z and the
shutdown threshold. True zener diodes (BV < 5V) and
higher voltage avalanche diodes have different I-V charac-
teristics (Figure 8). They need to be biased appropriately
(value of R3) in order to obtain correct UVLO threshold.
When implementing UVLO with converters with high input
ripple voltages (such as flyback and forward), the circuit
in Figure 7 is modified and shown in Figure 9.
1619fa
10
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