参数资料
型号: LT1640HIS8#TR
厂商: Linear Technology
文件页数: 8/16页
文件大小: 192K
描述: IC CTRLR HOTSWAP NEG VOLT 8SOIC
标准包装: 2,500
类型: 热交换控制器
应用: 通用
内部开关:
电源电压: -10 V ~ -80 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 带卷 (TR)
8
LT1640L/LT1640H
1640lhfb
APPLICATIONS INFORMATION
U
U
U
Capacitor C1 and resistor R3 prevent Q1 from momen-
tarily turning on when the power pins first make contact.
Without C1 and R3, capacitor C2 would pull the gate of Q1
up to a voltage roughly equal to V
EE
 " C2/C
GS
(Q1) before
the LT1640 could power up and actively pull the gate low.
By placing capacitor C1 in parallel with the gate capaci-
tance of Q1 and isolating them from C2 using resistor R3
the problem is solved. The value of C1 should be:
V
V
V
C    C
INMAX
TH
TH
GD

?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
"
+
(
)
2
where V
TH
 is the MOSFETs minimum gate threshold and
V
INMAX
 is the maximum operating input voltage.
R3s value is not critical and is given by (V
INMAX
 + V
GATE
)/
5mA.
The waveforms are shown in Figure 6b. When the power
pins make contact, they bounce several times. While the
contacts are bouncing, the LT1640 senses an undervoltage
condition and the GATE is immediately pulled low when
the power pins are disconnected.
Once the power pins stop bouncing, the GATE pin starts to
ramp up. When Q1 turns on, the GATE voltage is held
constant by the feedback network of R3 and C2. When the
DRAIN voltage has finished ramping, the GATE pin then
ramps to its final value.
Figure 6b. Inrush Control Waveforms
1640 F06b
INRUSH
CURRENT
1A/DIV
GATE  V
EE
10V/DIV
DRAIN
50V/DIV
V
EE
50V/DIV
5ms/DIV
CONTACT
BOUNCE
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