参数资料
型号: LT1765-2.5
厂商: Linear Technology Corporation
元件分类: 基准电压源/电流源
英文描述: Isolated Flyback Switching Regulator with 9V Output
中文描述: 隔离反激式开关稳压9V输出
文件页数: 13/20页
文件大小: 247K
代理商: LT1765-2.5
LT1765/LT1765-1.8/LT1765-2.5/
LT1765-3.3/LT1765-5
13
sn1765 1765fas
Example: with V
IN
= 10V, V
OUT
= 5V and I
OUT
= 2A:
P
W
P
W
P
W
SW
BOOST
Q
=
(
+
(
+
=
( ) (
10 0 001
.
)
( )( )
(
)
=
=
)
=
=
)
=
0 13 2
.
5
10
0 43
2
17 10
0 26
.
0 69
.
5
2 50
10
0 01
0 1
.
2
9
6
.
.
/
.
Total power dissipation, P
TOT
, is 0.69 + 0.1 + 0.01 = 0.8W.
Thermal resistance for the LT1765 16-lead TSSOP ex-
posed pad package is influenced by the presence of
internal or backside planes. With a full plane under the
package, thermal resistance will be about 45
°
C/W. With
no plane under the package, thermal resistance will in-
crease to about 110
°
C/W. For the exposed pad package
θ
JC(PAD)
= 10
°
C/W. Thermal resistance is dominated by
board performance. To calculate die temperature, use the
appropriate thermal resistance number and add in worst-
case ambient temperature:
T
J
= T
A
+
θ
JA
(P
TOT
)
When estimating ambient, remember the nearby catch
diode will also be dissipating power.
=
( )
P
V
V
V
V
I
DIODE
F
IN
OUT
LOAD
IN
(
)(
)
V
F
= Forward voltage of diode (assume 0.5V at 2A)
0 5 10 5 2
10
Notice that the catch diode’s forward voltage contributes
a significant loss in the overall system efficiency. A larger,
lower V
F
diode can improve efficiency by several percent.
Typical thermal resistance of the board
θ
B
is 35
°
C/W. At an
ambient temperature of 25
°
C,
T
J
= T
A
+
θ
JA
(P
TOT
) +
θ
B
(P
DIODE
)
T
J
= 25 + 45 (0.8) + 35 (0.5) = 79
°
C
P
W
DIODE
=
(
=
0 5
.
.
DIE TEMPERATURE MEASUREMENT
If a true die temperature is required, a measurement of the
SYNC to GND pin resistance can be used. The SYNC pin
resistance across temperature must first be calibrated,
with no significant output load, in an oven. An initial value
of 40k with a temperature coefficient of 0.16%/
°
C is
typical. The same measurement can then be used in
operation to indicate the die temperature.
FREQUENCY COMPENSATION
Before starting on the theoretical analysis of frequency
response, the following should be remembered—the worse
the board layout, the more difficult the circuit will be to
stabilize. This is true of almost all high frequency analog
circuits, read the ‘LAYOUT CONSIDERATIONS’ section
first. Common layout errors that appear as stability prob-
lems are distant placement of input decoupling capacitor
and/or catch diode, and connecting the V
C
compensation
to a ground track carrying significant switch current. In
addition, the theoretical analysis considers only first order
ideal component behavior. For these reasons, it is impor-
tant that a final stability check is made with production
layout and components.
The LT1765 uses current mode control. This alleviates
many of the phase shift problems associated with the
inductor. The basic regulator loop is shown in Figure 7,
with both tantalum and ceramic capacitor equivalent cir-
cuits. The LT1765 can be considered as two g
m
blocks, the
error amplifier and the power stage.
APPLICATIOU
W
U
U
Figure 7. Model for Loop Response
+
1.2V
V
SW
V
C
LT1765
GND
1765 F07
R1
OUTPUT
ESR
C
F
C
C
R
C
500k
ERROR
AMPLIFIER
FB
R2
C1
CURRENT MODE
POWER STAGE
g
m
= 5mho
g
m
=
850
μ
mho
+
ESL
CERAMIC
TANTALUM
C1
相关PDF资料
PDF描述
LT1767-2.5 Direct mounting on the PCB, Crimping connection, Discrete wire connectors; HRS No: 544-0063-6 00; No. of Positions: 15; Connector Type: Wire; Contact Gender: Male; Contact Spacing (mm): 2; Terminal Pitch (mm): 2; Termination Style: IDC; Current Rating(Amps)(Max.): 1; Contact Mating Area Plating: Tin; Operating Temperature Range (degrees C): -30 to 85; General Description: Housing; Straight; Direct PCB mounting; For AWG#26
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