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参数资料
| 型号： | LT1765-3.3 |
| 厂商： | Linear Technology Corporation |
| 英文描述： | CONTACT |
| 中文描述： | 单片，1.25MHz的步骤3a型开关稳压器 |
| 文件页数： | 14/20页 |
| 文件大小： | 247K |
| 代理商： | LT1765-3.3 |
LT1765/LT1765-1.8/LT1765-2.5/
LT1765-3.3/LT1765-5
14
sn1765 1765fas
Figure 8 shows the overall loop response with a 330pF V
C
capacitor and a typical 100
μ
F tantalum output capacitor.
The response is set by the following terms:
Error amplifier:
DC gain set by g
m
and R
L
= 850
μ
500k=425.
Pole set by C
F
and R
L
= (2
π
500k 330p)
–1
= 965Hz.
Unity-gain set by C
F
and g
m
= (2
π
330p 850
μ
–1
)
–1
=
410kHz.
Power stage:
DC gain set by g
m
and R
L
(assume 5
) = 5 5 = 25.
Pole set by C
OUT
and R
L
= (2
π
100
μ
10)
–1
= 159Hz.
Unity-gain set by C
OUT
and g
m
= (2
π
100
μ
5
–1
)
–1
= 8kHz.
Tantalum output capacitor:
Zero set by C
OUT
and C
ESR
= (2
π
100
μ
0.1)
–1
= 15.9kHz.
The zero produced by the ESR of the tantalum output
capacitor is very useful in maintaining stability. Ceramic
output capacitors do not have a zero due to very low ESR,
but are dominated by their ESL. They form a notch in the
1MHz to 10MHz range. Without this zero, the V
C
pole must
be made dominant. A typical value of 2.2nF will achieve
this.
If better transient response is required, a zero can be
added to the loop using a resistor (R
C
) in series with the
compensation capacitor. As the value of R
C
is increased,
transient response will generally improve, but two effects
limit its value. First, the combination of output capacitor
ESR and a large R
C
may stop loop gain rolling off
altogether. Second, if the loop gain is not rolled suffi-
ciently at the switching frequency, output ripple will
perturb the V
C
pin enough to cause unstable duty cycle
switching similar to subharmonic oscillation. This may
not be apparent at the output. Small signal analysis will
not show this since a continuous time system is assumed.
If needed, an additional capacitor (C
F
) can be added to the
V
C
pin to form a pole at typically one fifth the switching
frequency (If R
C
= ~ 5k, C
F
= ~ 100pF)
When checking loop stability, the circuit should be oper-
ated over the application’s full voltage, current and tem-
perature range. Any transient loads should be applied and
the output voltage monitored for a well-damped behavior.
CONVERTER WITH BACKUP OUTPUT REGULATOR
In systems with a primary and backup supply, for ex-
ample, a battery powered device with a wall adapter input,
the output of the LT1765 can be held up by the backup
supply with its input disconnected. In this condition, the
SW pin will source current into the V
IN
pin. If the SHDN pin
is held at ground, only the shutdown current of 6
μ
A will be
pulled via the SW pin from the second supply. With the
SHDN pin floating, the LT1765 will consume its quiescent
operating current of 1mA. The V
IN
pin will also source
current to any other components connected to the input
line. If this load is greater than 10mA or the input could be
shorted to ground, a series Schottky diode must be added,
as shown in Figure 9. With these safeguards, the output
can be held at voltages up to the V
IN
absolute maximum
rating.
BUCK CONVERTER WITH ADJUSTABLE SOFT-START
Large capacitive loads or high input voltages can cause
high input currents at start-up. Figure 10 shows a circuit
that limits the dv/dt of the output at start-up, controlling
the capacitor charge rate. The buck converter is a typical
configuration with the addition of R3, R4, C
SS
and Q1. As
the output starts to rise, Q1 turns on, regulating switch
current via the V
C
pin to maintain a constant dv/dt at the
output. Output rise time is controlled by the current
through C
SS
defined by R4 and Q1’s V
BE
. Once the output
is in regulation, Q1 turns off and the circuit operates
normally. R3 is transient protection for the base of Q1.
APPLICATIOU
W
U
U
Figure 8. Overall Loop Response
FREQUENCY (Hz)
G
80
60
40
20
0
–20
–40
P
180
150
120
90
60
30
0
1765 F08
GAIN
PHASE
V
OUT
= 5V
C
OUT
= 100
μ
F, 0.1
C
C
= 330pF
R
C
/C
F
= 0
I
LOAD
= 1A
10
1k
10k
1M
100
100k
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