参数资料
型号: LT1767EMS8#TR-3.3
厂商: LINEAR TECHNOLOGY CORP
元件分类: 稳压器
英文描述: 3 A SWITCHING REGULATOR, 1500 kHz SWITCHING FREQ-MAX, PDSO8
封装: PLASTIC, MSOP-8
文件页数: 2/16页
文件大小: 232K
代理商: LT1767EMS8#TR-3.3
10
LT1767/LT1767-1.8/
LT1767-2.5/LT1767-3.3/LT1767-5
fully recharged during the off time of the switch. The
capacitor value is derived from worst-case conditions of
700ns on-time, 50mA boost current, and 0.7V discharge
ripple. This value is then guard banded by 2x for secondary
factors such as capacitor tolerance, ESR and temperature
effects. The boost capacitor value could be reduced under
less demanding conditions, but this will not improve
circuit operation or efficiency. Under low input voltage and
low load conditions, a higher value capacitor will reduce
discharge ripple and improve start up operation.
SHUTDOWN AND UNDERVOLTAGE LOCKOUT
Figure 4 shows how to add undervoltage lockout (UVLO)
to the LT1767. Typically, UVLO is used in situations where
the input supply is
current limited, or has a relatively high
source resistance. A switching regulator draws constant
power from the source, so source current increases as
source voltage drops. This looks like a negative resistance
load to the source and can cause the source to current limit
or latch low under low source voltage conditions. UVLO
prevents the regulator from operating at source voltages
where these problems might occur.
An internal comparator will force the part into shutdown
below the minimum VIN of 2.6V. This feature can be used
to prevent excessive discharge of battery-operated sys-
tems. If an adjustable UVLO threshold is required, the
shutdown pin can be used. The threshold voltage of the
shutdown pin comparator is 1.33V. A 3
A internal current
source defaults the open pin condition to be operating (see
Typical Performance Graphs). Current hysteresis is added
above the SHDN threshold. This can be used to set voltage
hysteresis of the UVLO using the following:
R
VV
A
R
V
VV
R
A
HL
H
1
7
2
133
1
3
=
=
()
+
.
VH – Turn-on threshold
VL – Turn-off threshold
Example: switching should not start until the input is
above 4.75V and is to stop if the input falls below 4.25V.
VH = 4.75V
VL = 4.25V
R
VV
A
k
R
V
VV
k
A
k
1
475
4 25
7
71 4
2
133
475
1 33
71 4
3
26 1
=
=
()
+
=
..
.
..
.
Keep the connections from the resistors to the SHDN pin
short and make sure that the interplane or surface capaci-
tance to the switching nodes are minimized. If high resis-
tor values are used, the SHDN pin should be bypassed with
a 1nF capacitor to prevent coupling problems from the
switch node.
APPLICATIONS INFORMATION
WU
U
1.33V
GND
VSW
INPUT
R1
1767 F04
OUTPUT
SHDN
VCC
IN
LT1767
3
A
R2
C1
+
7
A
Figure 4. Undervoltage Lockout
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