参数资料
型号: LT1768IGN
厂商: Linear Technology
文件页数: 11/20页
文件大小: 0K
描述: IC CTRLR CCFL SGL/MULT HP 16SSOP
标准包装: 100
类型: CCFL 控制器
频率: 300 ~ 410 kHz
电流 - 电源: 7mA
电流 - 输出: 1.5A
电源电压: 9 V ~ 24 V
工作温度: -40°C ~ 125°C
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
供应商设备封装: 16-SSOP
包装: 管件
LT1768
APPLICATIO N S I N FOR M ATIO N
per lamp to 1mA for all PROG voltages but limits the
dimming ratio to 6:1.
Trace B in Figures 3a and 3b shows Figure 1’s CCFL
current waveform operating at 1mA in PWM mode.
Maximum current mode (V PROG > 4V) sets the VC source
current to five times the current out of the 1.25V refer-
enced R MAX pin. Setting R RMAX to produce CCFL current
equal to the manufacturer’s maximum rating in this mode
insures no degradation in the specified lamp lifetime. For
example, setting R4 in the circuit in Figure 1 to 16.2k sets
the maximum CCFL current to 9mA (9mA is only a typical
maximum lamp current used for illustration, consult lamp
specifications for the actual value). Trace A in Figure 3a
and 3b shows Figure 1’s CCFL current waveform operating
at 9mA in maximum current mode.
TRACE A
V PROG = 4.5V
I LAMP = 9mA RMS
TRACE B
V PROG = 1.125V
I LAMP = 1mA RMS
1ms/DIV
Figure 3a. CCFL Current for Circuit in Figure 1
TRACE A
V PROG = 4.5V
I LAMP = 9mA RMS
TRACE B
V PROG = 1.125V
I LAMP = 1mA RMS
100 μ s/DIV
Figure 3b. CCFL Current for Circuit in Figure 1
In linear mode (V PWM < V PROG < 4V), VC source current is
controlled linearly with the voltage on the PROG pin. The
equation for the VC source current in linear mode is
I VC = (V PROG – 1V)/3V (I RMAX ? 5). For the best current to
light conversion and highest efficiency, V PWM should be
set to make the LT1768 normally operate in the linear
mode. For example, in the circuit in Figure 1, linear mode
runs from V PROG = 3V to V PROG = 4V with lamp current
equal to (3mA)(V PROG –1V)/1V.
In PWM Mode (1V < V PROG < V PWM ), the VC source current
is modulated between the value set by minimum current
mode and the value for I VC in linear mode with V PROG =
V PWM . The PWM frequency is equal to 22Hz/C T ( μ F) with
its duty cycle set by the voltages on the PROG and PWM
pins and follows the equation:
DC = [1 – (V PWM – V PROG )/(V PWM – 1V)] ? 100%
The LT1768’s PWM mode enables wide dimming ratios
while reducing the high crest factor found in PWM only
dimming solutions. In the example of Figure 1, PWM
mode runs from V PROG = 1V to V PROG = 3V with CCFL
current modulated between 0mA and 6mA. The PWM
modulation frequency is set to 220Hz by capacitor C3.
When combined, these five modes of operation allow
creation of a DC controlled CCFL current profile that can be
tailored to each particular display. With linear mode CCFL
current control over the most widely used current range,
and PWM mode at the low end, the LT1768 enables wide
dimming ratios while maximizing CCFL lifetimes.
Lamp Feedback Current
In a typical application, the DIO1/2 pins are connected to
the low voltage side of the lamps. Each DIO pin is the
common connection between the cathode and anode of
two internal diodes (see Block Diagram). The remaining
terminals of the diodes are connected to PGND. Bidirec-
tional lamp current flows into the DIO1/2 pins and their
diodes conduct alternately on the half cycles. The diode
that conducts on the negative cycle has a percentage of its
current diverted into the VC pin. This current nulls against
the VC source current specified by the Multimode Dim-
ming section. A single capacitor on the VC pin provides
both stable loop compensation and an averaging function
to the halfwave-rectified lamp current. Therefore, current
into the VC pin from the lamp current programming
section relates to average lamp current.
The overall gain from the resistor current to average lamp
current is equal to the gain from the Multimode Dimming
block divided by the gain from the DIO pin to the VC pin,
11
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