参数资料
型号: LT1930AES5#TRM
厂商: Linear Technology
文件页数: 6/12页
文件大小: 0K
描述: IC REG BOOST ADJ 1A TSOT23-5
标准包装: 1
类型: 升压(升压)
输出类型: 可调式
输出数: 1
输出电压: 1.26 V ~ 34 V
输入电压: 2.45 V ~ 16 V
PWM 型: 电流模式
频率 - 开关: 2.2MHz
电流 - 输出: 1A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: SOT-23-5 细型,TSOT-23-5
包装: 剪切带 (CT)
供应商设备封装: TSOT-23-5
其它名称: LT1930AES5
LT1930AES5#TRMCT
LT1930AES5-ND
LT1930/LT1930A
APPLICATIO N S I N FOR M ATIO N
CAPACITOR SELECTION
Low ESR (equivalent series resistance) capacitors should
be used at the output to minimize the output ripple voltage.
Multi-layer ceramic capacitors are an excellent choice, as
they have extremely low ESR and are available in very
small packages. X5R dielectrics are preferred, followed by
X7R, as these materials retain the capacitance over wide
voltage and temperature ranges. A 4.7 μ F to 10 μ F output
capacitor is sufficient for most applications, but systems
with very low output currents may need only a 1 μ F or 2.2 μ F
output capacitor. Solid tantalum or OSCON capacitors can
be used, but they will occupy more board area than a
ceramic and will have a higher ESR. Always use a capacitor
with a sufficient voltage rating.
Ceramic capacitors also make a good choice for the input
decoupling capacitor, which should be placed as close as
possible to the LT1930/LT1930A. A 1 μ F to 4.7 μ F input
capacitor is sufficient for most applications. Table 3 shows
a list of several ceramic capacitor manufacturers. Consult
the manufacturers for detailed information on their entire
selection of ceramic parts.
Table 3. Ceramic Capacitor Manufacturers
By choosing the appropriate values for the resistor and
capacitor, the zero frequency can be designed to improve
the phase margin of the overall converter. The typical
target value for the zero frequency is between 35kHz to
55kHz. Figure 3 shows the transient response of the step-
up converter from Figure 1 without the phase lead capaci-
tor C3. The phase margin is reduced as evidenced by more
ringing in both the output voltage and inductor current. A
10pF capacitor for C3 results in better phase margin,
which is revealed in Figure 4 as a more damped response
and less overshoot. Figure 5 shows the transient response
when a 33 μ F tantalum capacitor with no phase lead
capacitor is used on the output. The higher output voltage
ripple is revealed in the upper waveform as a set of double
lines. The transient response is not greatly improved
which implies that the ESR zero frequency is too high to
increase the phase margin.
V OUT
0.2V/DIV
AC COUPLED
I LI
0.5A/DIV
AC COUPLED
Taiyo Yuden
AVX
(408) 573-4150
(803) 448-9411
www.t-yuden.com
www.avxcorp.com
LOAD 250mA
CURRENT 150mA
Murata
(714) 852-2001
www.murata.com
50 μ s/DIV
1930 F03
The decision to use either low ESR (ceramic) capacitors or
the higher ESR (tantalum or OSCON) capacitors can affect
the stability of the overall system. The ESR of any capaci-
tor, along with the capacitance itself, contributes a zero to
the system. For the tantalum and OSCON capacitors, this
zero is located at a lower frequency due to the higher value
of the ESR, while the zero of a ceramic capacitor is at a
much higher frequency and can generally be ignored.
Figure 3. Transient Response of Figure 1's Step-Up
Converter without Phase Lead Capacitor
V OUT
0.2V/DIV
AC COUPLED
I LI
0.5A/DIV
AC COUPLED
A phase lead zero can be intentionally introduced by
placing a capacitor (C3) in parallel with the resistor (R1)
LOAD 250mA
CURRENT
150mA
50 μ s/DIV
1930 F04
between V OUT and V FB as shown in Figure 1. The frequency
of the zero is determined by the following equation.
Figure 4. Transient Response of Figure 1's Step-Up
Converter with 10pF Phase Lead Capacitor
? Z =
6
1
2 π ? R 1 ? C 3
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