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| 型号： | LT1940EFE#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 7/20页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK ADJ 1.4A DL 16TSSOP |
| 标准包装： | 2,500 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 2 |
| 输出电压： | 1.25 V ~ 22 V |
| 输入电压： | 3.6 V ~ 25 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 1.1MHz |
| 电流 - 输出： | 1.4A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-TSSOP（0.173"，4.40mm）裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 16-TSSOP-EP |
LT1940/LT1940L
BLOCK DIAGRA
duty cycle of the power switch, the feedback loop controls
the peak current in the switch during each cycle. This
current mode control improves loop dynamics and pro-
vides cycle-by-cycle current limit.
The Block Diagram shows only one of the two switching
regulators. A pulse from the slave oscillator sets the RS
flip-flop and turns on the internal NPN bipolar power
switch. Current in the switch and the external inductor
begins to increase. When this current exceeds a level
determined by the voltage at V C , current comparator C1
resets the flip-flop, turning off the switch. The current in
the inductor flows through the external Schottky diode,
and begins to decrease. The cycle begins again at the next
pulse from the oscillator. In this way the voltage on the V C
pin controls the current through the inductor to the output.
The internal error amplifier regulates the output voltage by
continually adjusting the V C pin voltage.
The threshold for switching on the V C pin is 0.75V, and an
active clamp of 1.8V limits the output current. The V C pin
is also clamped to the RUN/SS pin voltage. As the internal
current source charges the external soft-start capacitor,
the current limit increases slowly.
APPLICATIO S I FOR ATIO
FB Resistor Network
The output voltage is programmed with a resistor divider
between the output and the FB pin. Choose the 1%
resistors according to:
R1 = R2(V OUT /1.25 – 1)
R2 should be 10.0k ? or less to avoid bias current errors.
Reference designators refer to the Block Diagram in
Figure 2.
Input Voltage Range
The minimum input voltage is determined by either the
LT1940’s minimum operating voltage of ~3.5V, or by its
maximum duty cycle. The duty cycle is the fraction of time
that the internal switch is on and is determined by the input
and output voltages:
DC = (V OUT + V D )/(V IN – V SW + V D )
Each switcher contains an independent oscillator. This
slave oscillator is normally synchronized to the master
oscillator. However, during start-up, short-circuit or over-
load conditions, the FB pin voltage will be near zero and an
internal comparator gates the master oscillator clock
signal. This allows the slave oscillator to run the regulator
at a lower frequency. This frequency foldback behavior
helps to limit switch current and power dissipation under
fault conditions.
The switch driver operates from either the input or from
the BOOST pin. An external capacitor and diode are used
to generate a voltage at the BOOST pin that is higher than
the input supply. This allows the driver to fully saturate the
internal bipolar NPN power switch for efficient operation.
A power good comparator trips when the FB pin is at 90%
of its regulated value. The PG output is an open collector
transistor that is off when the output is in regulation,
allowing an external resistor to pull the PG pin high. Power
good is valid when the LT1940 is enabled (either RUN/SS
pin is high) and V IN is greater than ~2.4V.
where V D is the forward voltage drop of the catch diode
(~0.4V) and V SW is the voltage drop of the internal switch
(~0.3V at maximum load). This leads to a minimum input
voltage of:
V INMIN = (V OUT + V D )/DC MAX - V D + V SW
with DC MAX = 0.78.
A more detailed analysis includes inductor loss and the
dependence of the diode and switch drop on operating
current. A common application where the maximum duty
cycle limits the input voltage range is the conversion of
5V to 3.3V. The maximum load current that the LT1940
can deliver at 3.3V depends on the accuracy of the 5V
input supply. With a low loss inductor (DCR less than
80m ? ), the LT1940 can deliver 1A for V IN > 4.7V and
1.4A for V IN > 4.85V.
1940fa
7
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| LT1940LEFE | 功能描述:IC REG BUCK ADJ 1.4A DL 16TSSOP RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:2,500 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.2V，1.5V，1.8V，2.5V 输入电压:2.7 V ~ 20 V PWM 型:- 频率 - 开关:- 电流 - 输出:50mA 同步整流器:是 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:10-TFSOP，10-MSOP（0.118"，3.00mm 宽）裸露焊盘 包装:带卷 (TR) 供应商设备封装:10-MSOP 裸露焊盘 |
| LT1940LEFE#PBF | 功能描述:IC REG BUCK ADJ 1.4A DL 16TSSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 产品培训模块:MIC23xxx HyperLight Load™ Regulators 标准包装:5,000 系列:HyperLight Load® 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.8V 输入电压:2.7 V ~ 5.5 V PWM 型:混合物 频率 - 开关:4MHz 电流 - 输出:2A 同步整流器:是 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:8-VFDFN 裸露焊盘，8-MLF? 包装:带卷 (TR) 供应商设备封装:8-MLF?（2x2） 产品目录页面:1094 (CN2011-ZH PDF) 其它名称:576-3303-2 |
| LT1940LEFE#TR | 功能描述:IC REG BUCK ADJ 1.4A DL 16TSSOP RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:2,500 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.2V，1.5V，1.8V，2.5V 输入电压:2.7 V ~ 20 V PWM 型:- 频率 - 开关:- 电流 - 输出:50mA 同步整流器:是 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:10-TFSOP，10-MSOP（0.118"，3.00mm 宽）裸露焊盘 包装:带卷 (TR) 供应商设备封装:10-MSOP 裸露焊盘 |
| LT1940LEFE#TRPBF | 功能描述:IC REG BUCK ADJ 1.4A DL 16TSSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:2,500 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.2V，1.5V，1.8V，2.5V 输入电压:2.7 V ~ 20 V PWM 型:- 频率 - 开关:- 电流 - 输出:50mA 同步整流器:是 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:10-TFSOP，10-MSOP（0.118"，3.00mm 宽）裸露焊盘 包装:带卷 (TR) 供应商设备封装:10-MSOP 裸露焊盘 |
| LT1940LEFEPBF | 制造商:Linear Technology 功能描述:Sw. Regulator Dual 1.4A 1.1MHz 7V TSSOP |
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