参数资料
型号: LT1952EGN#PBF
厂商: Linear Technology
文件页数: 15/28页
文件大小: 0K
描述: IC REG CTRLR ISO PWM CM 16-SSOP
标准包装: 100
PWM 型: 电流模式
输出数: 1
频率 - 最大: 560kHz
占空比: 90%
电源电压: 9.25 V ~ 25 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
包装: 管件
LT1952/LT1952-1
APPLICATIONS INFORMATION
Blanking is provided in 2 phases (Figure 6): The first phase
automatically blanks during gate rise time. Gate rise times
can vary depending on MOSFET type. For this reason the
LT1952/LT1952-1 perform true ‘leading edge blanking’ by
automatically blanking OC and I SENSE comparator outputs
until OUT rises to within 0.5V of V IN or reaches its clamp
level of 13V. The second phase of blanking starts after
the leading edge of OUT has been completed. This phase
is programmable by the user with a resistor connected
from the BLANK pin to ground. Typical durations for this
portion of the blanking period are from 45ns at R BLANK
= 10k to 540ns at R BLANK = 120k. Blanking duration can
be approximated as:
Blanking (extended) = [45(R BLANK /10k)]ns
(see graph in Typical Performance Characteristics)
(AUTOMATIC) (PROGRAMMABLE)
LEADING CURRENT
EDGE EXTENDED SENSE
BLANKING BLANKING DELAY
OUT
R BLANK
(MIN) 10k < R BLANK ≤ 240k 100ns
= 10k
BLANKING
0 Xns X + 45ns [X + 45(R BLANK /10k)]ns
1952 F06
Figure 6. Leading Edge Blank Timing
Programming Current Limit (OC Pin)
the MOSFET. The current limit for the converter can be
programmed by:
Current limit = (107mV/R S )(N P /N S ) – (1/2)(I RIPPLE )
where:
R S = sense resistor in source of primary MOSFET
I RIPPLE = p-p ripple current in the output inductor L1
N S = number of transformer secondary turns
N P = number of transformer primary turns
Programming Slope Compensation
The LT1952/LT1952-1 use a current mode architecture
to provide fast response to load transients and to ease
frequency compensation requirements. Current mode
switching regulators which operate with duty cycles above
50% and have continuous inductor current must add slope
compensation to their current sensing loop to prevent
subharmonic oscillations. (For more information on slope
compensation, see Application Note 19.) The LT1952/
LT1952-1 have programmable slope compensation to allow
a wide range of inductor values, to reduce susceptibility
to PCB generated noise and to optimize loop bandwidth.
The LT1952/LT1952-1 program slope compensation by
inserting a resistor R SLOPE in series with the I SENSE pin
(Figure 7). The LT1952/LT1952-1 generate a current at
the I SENSE pin which is linear from 0% duty cycle to the
maximum duty cycle of the OUT pin. A simple calculation
of I(I SENSE ) ? R SLOPE gives an added ramp to the voltage
at the I SENSE pin for programmable slope compensation.
(See both graphs ‘I SENSE Pin Current vs. Duty Cycle’ and
‘I SENSE Maximum Threshold vs Duty Cycle’ in the Typical
Performance Characteristics section.)
V S
R S
TheLT1952/LT1952-1useaprecise107mVsensethreshold
at the OC pin to detect overcurrent conditions in the
converter and set a soft-start latch. It is independent of
duty cycle because it is not affected by slope compensation
programmed at the I SENSE pin. The OC pin monitors the
peak current in the primary MOSFET by sensing the
voltage across a sense resistor (R S ) in the source of
CURRENT SLOPE = 35μA ? DC
LT1952/
LT1952-1
OUT
OC
R SLOPE
I SENSE
1952 F07
V (ISENSE) = V S + (I SENSE ? R SLOPE )
I SENSE = 8μA + 35DC μA
DC = DUTY CYCLE
FOR SYNC OPERATION
I SENSE(SYNC) = 8μA + (k ? 35DC)μA
k = f OSC /f SYNC
Figure 7. Programming Slope Compensation
19521fe
15
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