参数资料
型号: LT1959CS8#TR
厂商: Linear Technology
文件页数: 22/24页
文件大小: 0K
描述: IC REG BUCK ADJ 4.5A 8SOIC
标准包装: 2,500
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 1.21 V ~ 38 V
输入电压: 4.3 V ~ 15 V
PWM 型: 电流模式
频率 - 开关: 500kHz
电流 - 输出: 4.5A
同步整流器:
工作温度: 0°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
包装: 带卷 (TR)
供应商设备封装: 8-SOIC
LT1959
APPLICATIO N S I N FOR M ATIO N
converters 120 ° out of phase with each other reduces
input and output ripple currents. This reduces the ripple
rating, size and cost of filter capacitors.
Current Sharing/Split Input Supplies
Current sharing is accomplished by joining the V C pins to
a common compensation capacitor. The output of the
error amplifier is a gm stage, so any number of devices can
be connected together. The effective gm of the composite
error amplifier is the multiple of the individual devices. In
Figure 15, the compensation capacitor C4 has been
increased by × 3. Tolerances in the reference voltages
result in small offset currents to flow between the V C pins.
The overall effect is that the loop regulates the output at a
voltage between the minimum and maximum reference of
the devices used. Switch current matching between
devices will be typically better than 300mA. The negative
temperature coefficient of the V C to switch current transcon-
ductance prevents current hogging.
A common V C voltage forces each LT1959 to operate at the
same switch current, not duty cycle. Each device operates
Synchronized Ripple Currents
A ring counter generates three synchronization signals at
600kHz, 33% duty cycle phased 120 ° apart. The sync
input will operate over a wide range of duty cycles, so no
further pulse conditioning is needed. Each device’s maxi-
mum input ripple current is a 4A square wave at 600kHz.
When synchronously added together, the ripple remains
at 4A but frequency increases to 1.8MHz. Likewise, the
output ripple current is a 1.8MHz triangular waveform,
with maximum amplitude of 350mA at 5V V IN . Interest-
ingly, at 7.6V and 15V V IN , the theoretical summed output
ripple current cancels completely. To reduce board space
and ripple voltage, C1 and C3 are ceramic capacitors. Loop
compensation C4 must be adjusted when using ceramic
output capacitors due to the lack of effective series resis-
tance. The typical tantalum compensation of 1.5nF is
increased to 22nF ( × 3) for the ceramic output capacitor.
If synchronization is not used and the internal oscillators
free run, the circuit will operate correctly, but ripple
cancellation will not occur. Input and output capacitors
must be ripple rated for the total output current.
at the duty cycle defined by its respective input voltage. In
Figure 15, the input could be split and each device oper-
ated at a different voltage. The common V C ensures
loading is shared between inputs.
C1, C3: MARCON THCS50E1E106Z
1.8MHz
3-BIT RING
COUNTER
D1: ROHM RB051L-40
D2: 1N914
L1: DO3316P-682
LT1959
LT1959
LT1959
V C SYNC SW GND V IN BOOST FB
V C SYNC SW GND V IN BOOST FB
V C SYNC SW GND V IN BOOST FB
R1
2.5V
12A
2.67k
INPUT
4.3V TO 15V
+
C3A
10 μ F
25V
D2A
+
C3B
10 μ F
25V
D2B
+
C4
68nF
25V
+
C3C
10 μ F
25V
D2C
1% +
R2
2.49k
1%
C1
10 μ F
25V
D1A
D1B
D1C
L1A
6.8 μ H
C2A
330nF
10V
L1B
6.8 μ H
C2B
330nF
10V
L1C
6.8 μ H
C2C
330nF
10V
1959 F15
Figure 15. Current Sharing 12A Supply
22
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