参数资料
型号: LT1965IDD-1.5#TRPBF
厂商: Linear Technology
文件页数: 11/22页
文件大小: 0K
描述: IC REG LDO 1.5V 1.1A 8-DFN
产品培训模块: More Information on LDOs
标准包装: 2,500
稳压器拓扑结构: 正,固定式
输出电压: 1.5V
输入电压: 最高 20V
电压 - 压降(标准): 0.31V @ 1.1A
稳压器数量: 1
电流 - 输出: 1.1A
电流 - 限制(最小): 1.2A
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 8-WFDFN 裸露焊盘
供应商设备封装: 8-DFN-EP(3x3)
包装: 带卷 (TR)
LT1965 Series
PIN FUNCTIONS
(DFN/MSOP/DD-Pak/TO-220)
OUT (Pins 1, 2 / 1, 2 / 4 / 4): Output. This pin supplies
power to the load. Use a minimum output capacitor of
10μF to prevent oscillations. Large load transient applica-
tions require larger output capacitors to limit peak voltage
transients. See the Applications Information section for
more information on output capacitance and reverse-output
characteristics.
SENSE (Pin 3 / 3 / 5 / 5): Sense. For fixed voltage versions
of the LT1965 (LT1965-1.5/LT1965-1.8/ LT1965-2.5/
LT1965-3.3), the SENSE pin is the input to the error am-
plifier. Optimum regulation is obtained when the SENSE
pin is connected to the OUT pin of the regulator. In criti-
cal applications, small voltage drops are caused by the
resistance (R P ) of PCB traces between the regulator and
the load. These drops may be eliminated by connecting
the SENSE pin to the output at the load as shown in Figure
1 (Kelvin Sense Connection). Note that the voltage drop
across the external PCB traces will add to the dropout
voltage of the regulator. The SENSE pin bias current is
100μA at the nominal rated output voltage.
ADJ (Pin 3 / 3 / 5 / 5): Adjust. This pin is the input to the
error amplifier. It has a typical bias current of 1.3μA that
flows into the pin. The ADJ pin voltage is 1.20V referenced
to ground.
GND (Pins 4, 5 / 4, 5 / 3 / 3): Ground. For the adjustable
LT1965, connect the bottom of the resistor divider, setting
output voltage, directly to GND for optimum regulation.
SHDN (Pin 6 / 6 / 1 / 1): Shutdown. Pulling the SHDN pin
low puts the LT1965 into a low power state and turns the
output off. Drive the SHDN pin with either logic or an open
collector/drain with a pull-up resistor. The resistor sup-
plies the pull-up current to the open collector/drain logic,
normally several microamperes and the SHDN pin current,
typically less than 5.5μA. If unused, connect the SHDN pin
to V IN . The SHDN pin cannot be driven below GND unless
it is tied to the IN pin. If the SHDN pin is driven below
GND while IN is powered, the output will turn on. SHDN
pin logic cannot be referenced to a negative supply rail.
IN (Pins 7, 8 / 7, 8 / 2 / 2): Input. This pin supplies power
to the device. The LT1965 requires a bypass capacitor at
IN if located more than six inches from the main input filter
capacitor. Include a bypass capacitor in battery-powered
circuits as a battery’s output impedance generally rises
with frequency. A bypass capacitor in the range of 1μF to
10μF suffices. The LT1965’s design withstands reverse
voltages on the IN pin with respect to ground and the
OUT pin. In the case of a reversed input, which occurs if
a battery is plugged in backwards, the LT1965 behaves
as if a diode is in series with its input. No reverse current
flows into the LT1965 and no reverse voltage appears at
the load. The device protects itself and the load.
Exposed Pad (Pin 9 / 9, DFN and MSOP Packages Only):
Ground. Tie this pin directly to Pins 4 and 5 and the PCB
ground. This pin provides enhanced thermal performance
with its connection to the PCB ground. See the Applica-
tions Information section for thermal considerations and
calculating junction temperature.
IN
OUT
LT1965
R P
V IN
+
SHDN SENSE
GND
+
LOAD
R P
1965 F01
Figure 1. Kelvin Sense Connection
11
For more information www.linear.com/LT1965
1965fb
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