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| 型号： | LT1990IS8#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 7/16页 |
| 文件大小： | 0K |
| 描述： | IC AMP DIFF +/-250V MCRPWR 8SOIC |
| 标准包装： | 100 |
| 放大器类型： | 差分 |
| 电路数： | 1 |
| 输出类型： | 满摆幅 |
| 转换速率： | 0.55 V/µs |
| -3db带宽： | 105kHz |
| 电压 - 输入偏移： | 900µV |
| 电流 - 电源： | 140µA |
| 电流 - 输出 / 通道： | 22mA |
| 电压 - 电源，单路/双路(±)： | 2.7 V ~ 36 V，±1.35 V ~ 18 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SO |
| 包装： | 管件 |
LT1990
15
1990fb
APPLICATIO S I FOR ATIO
WU
UU
While the LT1990 comes from the factory with an excellent
CMRR, some precision applications with a large applied
common mode voltage may require a method to trim out
residual common mode error. This is easily accomplished
by adding series resistance to each input, +IN and –IN,
such that an adjustable resistance difference of
±1k is
provided. This is most easily realized by adding a fixed
1k
in series with one of the inputs, and a 2k trimmer in
series with the other as shown in Figure 1. The trim range
of this configuration is
±0.1% for the internal gain resistor
matching, so a much more finely resolved correction is
available using the LT1990 than is realizable with ordinary
discrete solutions. In applications where the input
common mode voltage is relatively constant and large
(perhaps at or beyond the supply range), this same
configuration can be treated as an offset adjustment.
–
+
LT1990
1k
2k
Figure 1. Optional CMRR Trim
Dual Differential-Input Arithmetic Block
The internal resistor network topology of the LT1990
allows the GAIN1 and GAIN2 pins to be used as another
differential input in addition to the normal +IN and –IN
port. This can be a very useful function for implementing
servo-loop differential error amplifiers, for example. In
this mode of operation, the output is governed by the
following relationship:
VO = 10 (V+IN – V–IN + VGAIN2 – VGAIN1) + VREF
Unlike the main inputs, the GAIN1 and GAIN2 pins are
clamped by substrate diodes and ESD structures, thus the
operating voltage range of these pins is limited to V– – 0.2V
to V– + 36V. If the GAIN inputs are brought beyond the
operating input range, care must be taken to limit the input
currents to less than 10mA to prevent damage to the device.
For best results in this mode of operation the common mode
voltage of the GAIN1 and GAIN2 pins should be equal to the
REF pin voltage. Also, since the gain setting resistors associ-
ated with the GAIN1 and GAIN2 inputs are in the 10k
area,
lowsourceimpedancesareparticularlyimportanttopreserve
the precision of the LT1990.
This dual differential input mode of operation is used in the
circuit as shown in Figure 2.
This circuit is a high efficiency H-bridge driver that is PWM
modulated to provide a controlled current to an electro-
magnet coil. Since the common mode voltage of the
current sense resistor RS varies with operating current
and the coil properties, a differential feedback is required.
In this application, it was desirable to allow the control
input to utilize the wide common mode range port (+IN and
–IN) so that constraints on input referencing are elimi-
nated. The GAIN1 and GAIN2 pins always operate within
the supply range and both ports operate with a gain of 10
to develop the loop error. The LTC1923 provides the loop
integrator and PWM functions of the servo.
Figure 2. PWM-Based
±1A Electromagnet Current Controller
PLLLPF
RSLEW
SDSYNC
CNTRL
EAOUT
FB
AGND
SS
ILIM
RT
CT
VREF
PDRVB
NDRVB
VDD
PGND
NDRVA
PDRVA
LTC1923
VDD
–
+
LT1990
REF
10k
330pF
1
F
10
F
L1
10
H
VDD
RS
0.1
C1, C2, C3: TAIYO YUDEN JMK325BJ226MM-T (X7R)
L1, L2: SUMIDA CDRH6D2B-220NC
*MNA, MPA: SILICONIX Si9801
**MNB, MPB: SILICONIX Si9801
1990 F02
10nF
1
F
100k
20k
100k
10k
1
F
L2
10
H
C1
22
F
C2
22
F
C3
22
F
MPA*
VREF
MPB**
MNA*
MNB**
100k
82k
G2
G1
1
4
8
6
5
7
3
2
VIN+
VIN–
VDD
ICOIL ELECTRO-
MAGNET
COIL
0.1
ICOIL = (VIN+ – VIN)/(10 RS)
(i.e.
±1A FOR ±1V)
VTHRM
H/C
VTEC
ITEC
TEC+
TEC–
VSET
FAULT
CS+
CS–
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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