参数资料
| 型号： | LT1993CUD-2#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 4/20页 |
| 文件大小： | 0K |
| 描述： | IC DIFF AMP/ADC DRVR 16-QFN |
| 标准包装： | 121 |
| 放大器类型： | 差分 |
| 电路数： | 2 |
| 输出类型： | 差分 |
| 转换速率： | 1100 V/µs |
| -3db带宽： | 800MHz |
| 电流 - 输入偏压： | 5µA |
| 电压 - 输入偏移： | 1000µV |
| 电流 - 电源： | 100mA |
| 电流 - 输出 / 通道： | 45mA |
| 电压 - 电源，单路/双路(±)： | 4 V ~ 5.5 V，±2 V ~ 2.5 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-WFQFN 裸露焊盘 |
| 供应商设备封装： | 16-QFN-EP（3x3） |
| 包装： | 管件 |
| 产品目录页面： | 1322 (CN2011-ZH PDF) |
LT1993-2
12
19932fa
VOCM (Pin 2): This pin sets the output common mode
voltage. Without additional biasing, both inputs bias to
this voltage as well. This input is high impedance.
VCCA, VCCB, VCCC (Pins 3, 10, 1): Positive Power Supply
(Normally Tied to 5V). All three pins must be tied to the
same voltage. Bypass each pin with 1000pF and 0.1F
capacitors as close to the package as possible. Split
supplies are possible as long as the voltage between VCC
and VEE is 5V.
VEEA, VEEB, VEEC (Pins 4, 9, 12): Negative Power Supply
(Normally Tied to Ground). All three pins must be tied to
the same voltage. Split supplies are possible as long as
the voltage between VCC and VEE is 5V. If these pins are
not tied to ground, bypass each pin with 1000pF and 0.1F
capacitors as close to the package as possible.
+OUT, –OUT (Pins 5, 8): Outputs (Unltered). These
pins are high bandwidth, low-impedance outputs. The DC
output voltage at these pins is set to the voltage applied
at VOCM.
+OUTFILTERED, –OUTFILTERED (Pins 6, 7): Filtered
Outputs. These pins add a series 25
Ω resistor from the
unltered outputs and three 12pF capacitors. Each output
has 12pF to VEE, plus an additional 12pF between each pin
(See the Block Diagram). This lter has a –3dB bandwidth
of 175MHz.
ENABLE (Pin 11): This pin is a TTL logic input referenced
to the VEEC pin. If low, the LT1993-2 is enabled and draws
typically 100mA of supply current. If high, the LT1993-2
is disabled and draws typically 250A.
+INA, +INB (Pins 15, 16): Positive Inputs. These pins are
normally tied together. These inputs may be DC- or AC-
coupled. If the inputs are AC-coupled, they will self-bias
to the voltage applied to the VOCM pin.
–INA, –INB (Pins 14, 13): Negative Inputs. These pins are
normally tied together. These inputs may be DC- or AC-
coupled. If the inputs are AC-coupled, they will self-bias
to the voltage applied to the VOCM pin.
Exposed Pad (Pin 17): Tie the pad to VEEC (Pin 12). If split
supplies are used, DO NOT tie the pad to ground.
PI FU CTIO S
UU
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