参数资料
型号: LT1993IUD-10#TRPBF
厂商: Linear Technology
文件页数: 5/16页
文件大小: 0K
描述: IC DIFF AMP/ADC DRVR 16-QFN
标准包装: 2,500
放大器类型: 差分
电路数: 2
输出类型: 差分
转换速率: 1100 V/µs
-3db带宽: 700MHz
电流 - 输入偏压: 5µA
电压 - 输入偏移: 1000µV
电流 - 电源: 100mA
电流 - 输出 / 通道: 45mA
电压 - 电源,单路/双路(±): 4 V ~ 5.5 V,±2 V ~ 2.5 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-WFQFN 裸露焊盘
供应商设备封装: 16-QFN-EP(3x3)
包装: 带卷 (TR)
LT1993-10
13
199310fb
APPLICATIO S I FOR ATIO
WU
U
To decrease lter bandwidth, add two external capaci-
tors, one from +OUTFILTERED to ground, and the other
from –OUTFILTERED to ground. A single differential
capacitor connected between +OUTFILTERED and –OUT-
FILTERED can also be used, but since it is being driven
differentially it will appear at each ltered output as a
single-ended capacitance of twice the value. To halve the
lter bandwidth, for example, two 36pF capacitors could
be added (one from each ltered output to ground). Al-
ternatively one 18pF capacitor could be added between
the ltered outputs, again halving the lter bandwidth.
Combinations of capacitors could be used as well; a three
capacitor solution of 12pF from each ltered output to
ground plus a 12pF capacitor between the ltered outputs
would also halve the lter bandwidth (Figure 7).
Bandpass ltering is also easily implemented with just a
few external components. An additional 120pF and 39nH,
each added differentially between +OUTFILTERED and
–OUTFILTERED creates a bandpass lter with a 71MHz
center frequency, –3dB points of 55MHz and 87MHz, and
1.6dB of insertion loss (Figure 8).
Figure 6. LT1993-10 Internal Filter Topology Modied
for 2x Filter Bandwidth (2 External Resistors)
Output Common Mode Adjustment
The LT1993-10’s output common mode voltage is set by
the VOCM pin. It is a high-impedance input, capable of
setting the output common mode voltage anywhere in
a range from 1.1V to 3.6V. Bandwidth of the VOCM pin is
typically 300MHz, so for applications where the VOCM pin
is tied to a DC bias voltage, a 0.1F capacitor at this pin is
recommended. For best distortion performance, the voltage
at the VOCM pin should be between 1.8V and 2.6V.
When interfacing with most ADCs, there is generally a VOCM
output pin that is at about half of the supply voltage of the
ADC. For 5V ADCs such as the LTC17XX family, this VOCM
output pin should be connected directly (with the addition of
a 0.1F capacitor) to the input VOCM pin of the LT1993-10.
For 3V ADCs such as the LTC22XX families, the LT1993-
10 will function properly using the 1.65V from the ADC’s
VCM reference pin, but improved Spurious Free Dynamic
Range (SFDR) and distortion performance can be achieved
by level-shifting the LTC22XX’s VCM reference voltage up to
at least 1.8V. This can be accomplished as shown in Figure
9 by using a resistor divider between the LTC22XX’s VCM
output pin and VCC and then bypassing the LT1993-10’s
VOCMpin with a 0.1F capacitor. For a common mode volt-
age above 1.9V, AC coupling capacitors are recommended
between the LT1993-10 and the LTC22XX ADC because of
the input voltage range constraints of the ADC.
Figure 7. LT1993-10 Internal Filter Topology Modied
for 1/2x Filter Bandwidth (3 External Capacitors)
VEE
19932 F06
25
9
25
9
12pF
LT1993-10
–OUT
+OUT
25
9
25
9
12pF
–OUTFILTERED
FILTERED OUTPUT
(350MHz)
+OUTFILTERED
8
7
6
5
VEE
199310 F07
25
9
12pF
LT1993-10
–OUT
+OUT
25
9
12pF
–OUTFILTERED
+OUTFILTERED
8
7
6
5
FILTERED OUTPUT
(87.5MHz)
Figure 8. LT1993-10 Output Filter Topology Modied for
Bandpass Filtering (1 External Inductor, 1 External Capacitor)
VEE
199310 F08
25
9
12pF
LT1993-10
–OUT
+OUT
25
9
12pF
120pF
39nH
–OUTFILTERED
+OUTFILTERED
8
7
6
5
FILTERED OUTPUT
(71MHz BANDPASS,
–3dB @ 55MHz/87MHz)
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