参数资料
型号: LT3010EMS8E#TRPBF
厂商: Linear Technology
文件页数: 8/18页
文件大小: 0K
描述: IC REG LDO ADJ 50MA 8-MSOP
产品培训模块: More Information on LDOs
标准包装: 2,500
稳压器拓扑结构: 正,可调式
输出电压: 1.275 V ~ 60 V
输入电压: 3 V ~ 80 V
电压 - 压降(标准): 0.3V @ 50mA
稳压器数量: 1
电流 - 输出: 50mA
电流 - 限制(最小): 60mA
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 8-TSSOP,8-MSOP(0.118",3.00mm 宽)裸露焊盘
供应商设备封装: 8-MSOP-EP
包装: 带卷 (TR)
LT3010/LT3010-5
PIN FUNCTIONS
+
+
LOAD
V IN
OUT(Pin1): Output.Theoutputsuppliespowertotheload.
A minimum output capacitor of 1μF is required to prevent
oscillations. Larger output capacitors will be required for
applications with large transient loads to limit peak volt-
age transients. See the Applications Information section
for more information on output capacitance and reverse
output characteristics.
SENSE (Pin 2): Sense. For the LT3010-5, the SENSE pin
is the input to the error amplifier. Optimum regulation will
be obtained at the point where the SENSE pin is connected
to the OUT pin of the regulator. In critical applications,
small voltage drops are caused by the resistance (R P ) of
PC traces between the regulator and the load. These may
be eliminated by connecting the SENSE pin to the output
at the load as shown in Figure 1 (Kelvin Sense Connec-
tion). Note that the voltage drop across the external PC
traces will add to the dropout voltage of the regulator.
The SENSE pin bias current is 10μA at the nominal rated
output voltage.
ADJ (Pin 2): Adjust. For the adjustable LT3010, this is the
input to the error amplifier. This pin is internally clamped
to ±7V. It has a bias current of 50nA which flows into the
pin (see curve of ADJ Pin Bias Current vs Temperature
8 1 R P
IN OUT
LT3010
5 2
SHDN SENSE
GND
4, 9
30105 F01
Figure 1. Kelvin Sense Connection
in the Typical Performance Characteristics). The ADJ pin
voltage is 1.275V referenced to ground, and the output
voltage range is 1.275V to 60V.
NC (Pins 3, 6, 7): No Connection. May be floated, tied to
IN or tied to GND.
GND (Pin 4, Pin 9): Ground. The exposed backside (pin 9)
of the package is an electrical connection for GND. As
such, to ensure optimum device operation, pin 9 must be
connected directly to pin 4 on the PC board.
SHDN (Pin 5): Shutdown. The SHDN pin is used to put
the LT3010 into a low power shutdown state. The output
will be off when the SHDN pin is pulled low. The SHDN
pin can be driven either by 5V logic or open-collector logic
with a pull-up resistor. The pull-up resistor is only required
to supply the pull-up current of the open-collector gate,
normally several microamperes. If unused, the SHDN pin
must be tied to a logic high or V IN .
IN (Pin 8): Input. Power is supplied to the device through
the IN pin. A bypass capacitor is required on this pin if
the device is more than six inches away from the main
input filter capacitor. In general, the output impedance of
a battery rises with frequency, so it is advisable to include
a bypass capacitor in battery-powered circuits. A bypass
capacitor in the range of 1μF to 10μF is sufficient. The
LT3010 is designed to withstand reverse voltages on the IN
pin with respect to ground and the OUT pin. In the case of
a reversed input, which can happen if a battery is plugged
in backwards, the LT3010 will act as if there is a diode in
series with its input. There will be no reverse current flow
into the LT3010 and no reverse voltage will appear at the
load. The device will protect both itself and the load.
30105fe
8
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