参数资料
型号: LT3021ES8-1.8#TRPBF
厂商: Linear Technology
文件页数: 9/16页
文件大小: 0K
描述: IC REG LDO 1.8V .5A 8-SOIC
产品培训模块: More Information on LDOs
标准包装: 2,500
稳压器拓扑结构: 正,固定式
输出电压: 1.8V
输入电压: 最高 10V
电压 - 压降(标准): 0.155V @ 500mA
稳压器数量: 1
电流 - 输出: 500mA
电流 - 限制(最小): 550mA
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 带卷 (TR)
LT3021/LT3021-1.2/
LT3021-1.5/LT3021-1.8
PIN FUNCTIONS
(DH Package/S8 Package)
OUT (Pins 3, 4/Pin 2): These pins supply power to the load.
Use a minimum output capacitor of 3.3μF to prevent oscil-
lations. Applications with large load transients require larger
output capacitors to limit peak voltage transients. See the
Applications Information section for more information on
output capacitance and reverse output characteristics.
SENSE (Pin 7/Pin 3, Fixed Voltage Device Only): This pin
is the sense point for the internal resistor divider. It should
be tied directly to the OUT pins for best results.
ADJ (Pin 7/Pin 3): This pin is the inverting terminal to the
error ampli?er. Its typical input bias current of 20nA ?ows
out of the pin (see curve of ADJ Pin Bias Current vs Tem-
perature in the Typical Performance Characteristics). The
ADJ pin reference voltage is 200mV (referred to GND).
AGND (Pin 8/Pin 4): Ground.
PGND (Pins 10, 17/Pin 6): Ground.
SHDN (Pin 9/Pin 5): The SHDN pin puts the LT3021 into
a low power state. Pulling the SHDN pin low turns the
output off. Drive the SHDN pin with either logic or an open
collector/drain device with a pull-up resistor. The pull-up
resistor supplies the pull-up current to the open collector/
drain logic, normally several microamperes, and the SHDN
pin current, typically 2.5μA. If unused, connect the SHDN
pin to V IN . The LT3021 does not function if the SHDN pin
is not connected.
IN (Pins 12, 14/Pin 8): These pins supply power to the
device. The LT3021 requires a bypass capacitor at IN if
it is more than six inches away from the main input ?lter
capacitor. The output impedance of a battery rises with
frequency, so include a bypass capacitor in battery-pow-
ered circuits. A bypass capacitor in the range of 3.3μF to
10μF suf?ces. The LT3021 withstands reverse voltages
on the IN pin with respect to ground and the OUT pin. In
the case of a reversed input, which occurs if a battery is
plugged in backwards, the LT3021 acts as if a diode is
in series with its input. No reverse current ?ows into the
LT3021 and no reverse voltage appears at the load. The
device protects itself and the load.
EXPOSED PAD (Pin 17, DH16 Package Only): Ground.
Solder Pin 17 to the PCB ground. Connect directly to Pins
8, 10 for best performance.
NC (Pins 1, 2, 5, 6, 11, 13, 15, 16/Pins 1, 7): No Connect.
No connect pins may be ?oated, tied to IN or tied to GND.
BLOCK DIAGRAM
(DH Package/S8 Package)
IN
(12, 14/8)
SHDN
(9/5)
SHUTDOWN
THERMAL
SHUTDOWN
R3
D1
Q3
BIAS CURRENT
200mV
ERROR AMP
CURRENT
GAIN
Q1
AND
REFERENCE
D2
OUT
(3,4/2)
GENERATOR
212mV
NO-LOAD
RECOVERY
+
25k
Q2
R2
OUT SENSE
(7/3)
ADJ
(7/3)
NOTE:
FOR LT3021 ADJUST PIN (7/3) IS CONNECTED TO
THE ADJUST PIN, R1 AND R2 ARE EXTERNAL.
FOR LT3021-1.X PIN (7/3) IS CONNECTED TO THE
OUTPUT SENSE PIN, R1 AND R2 ARE INTERNAL.
FIXED
V OUT
1.2V
1.5V
1.8V
R1 R2
20k 100k
20k 130k
20k 160k
R1
3021 BD
GND
(8,10,17/4,6)
3021fc
9
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