参数资料
| 型号： | LT3024EDE#TRPBF |
| 厂商： | Linear Technology |
| 文件页数： | 12/20页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO ADJ .5A/.1A 12-DFN |
| 产品培训模块： | More Information on LDOs |
| 标准包装： | 2,500 |
| 稳压器拓扑结构： | 正，可调式 |
| 输出电压： | 1.22 V ~ 20 V |
| 输入电压： | 1.8 V ~ 20 V |
| 电压 - 压降（标准）： | 0.3V @ 500mA，0.3V @ 100mA |
| 稳压器数量： | 2 |
| 电流 - 输出： | 500mA，100mA |
| 电流 - 限制（最小）： | 520mA，110mA |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 12-WFDFN 裸露焊盘 |
| 供应商设备封装： | 12-DFN（4x3） |
| 包装： | 带卷 (TR) |
LT3024
PIN FUNCTIONS
(DFN/TSSOP)
GND (Pins 4, 13)/(Pins 1, 5, 8, 9, 16, 17): Ground. The
Exposed Pad must be soldered to PCB ground for optimum
thermal performance.
ADJ1/ADJ2 (Pins 12/7)/(Pins 15/10): Adjust Pin. These
are the input to the error ampli?ers. These pins are inter-
nally clamped to ±7V. They have a bias current of 30nA
which ?ows into the pin (see curve of ADJ1/ADJ2 Pin
Bias Current vs Temperature in the Typical Performance
Characteristics section). The ADJ1 and ADJ2 pin voltage
is 1.22V referenced to ground and the output voltage
range is 1.22V to 20V.
BYP1/BYP2 (Pins 1/6)/(Pins 2/7): Bypass. The BYP1/
BYP2 pins are used to bypass the reference of the LT3024
regulator to achieve low noise performance from the
regulator. The BYP1/BYP2 pins are clamped internally to
± 0.6V (one V BE ) from ground. A small capacitor from the
corresponding output to this pin will bypass the reference
to lower the output voltage noise. A maximum value of
0.01μF can be used for reducing output voltage noise to
a typical 20μV RMS over a 10Hz to 100kHz bandwidth. If
not used, this pin must be left unconnected.
OUT1/OUT2 (Pins 2, 3/5)/(Pins 3, 4/6): Output. The outputs
supply power to the loads. A minimum output capacitor of
1μF is required to prevent oscillations on Output 2; Output
1 requires a minimum of 3.3μF. Larger output capacitors
SHDN1 / SHDN2 (Pins 11/8)/(Pins 14/11): Shutdown. The
SHDN1 / SHDN2 pins are used to put the corresponding
output of the LT3024 regulator into a low power shutdown
state. The output will be off when the pin is pulled low.
The SHDN1 / SHDN2 pins can be driven either by 5V logic
or open-collector logic with pull-up resistors. The pull-up
resistors are required to supply the pull-up current of the
open-collector gates, normally several microamperes, and
the SHDN1 / SHDN2 pin current, typically 1μA. If unused, the
pin must be connected to V IN . The device will not function
if the SHDN1 / SHDN2 pins are not connected.
IN (Pins 9, 10)/(Pins 12, 13): Input. Power is supplied
to the device through the IN pin. A bypass capacitor is
required on this pin if the device is more than six inches
away from the main input ?lter capacitor. In general, the
output impedance of a battery rises with frequency, so
it is advisable to include a bypass capacitor in battery-
powered circuits. A bypass capacitor in the range of 1μF
to 10μF is suf?cient. The LT3024 regulator is designed to
withstand reverse voltages on the IN pin with respect to
ground and the OUT pin. In the case of a reverse input,
which can happen if a battery is plugged in backwards, the
device will act as if there is a diode in series with its input.
There will be no reverse current ?ow into the regulator
and no reverse voltage will appear at the load. The device
will protect both itself and the load.
will be required for applications with large transient loads
to limit peak voltage transients. See the Applications Infor-
mation section for more information on output capacitance
and reverse output characteristics.
3024fa
12
相关PDF资料 |
PDF描述 |
|---|---|
| LT3024EDE#TR | IC REG LDO ADJ .5A/.1A 12DFN |
| LT1963AEQ#TR | IC REG LDO ADJ 1.5A 5-DD |
| LT1963AEQ-3.3#TR | IC REG LDO 3.3V 1.5A 5DD |
| LT1963AEQ-2.5#TR | IC REG LDO 2.5V 1.5A 5DD |
| LT1963AEQ-1.8#TR | IC REG LDO 1.8V 1.5A 5DD |
相关代理商/技术参数 |
参数描述 |
|---|---|
| LT3024EFE | 功能描述:IC REG LDO ADJ .5A/.1A 16TSSOP RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 系列:- 标准包装:800 系列:- 稳压器拓扑结构:正，固定式 输出电压:2.5V 输入电压:最高 16V 电压 - 压降（标准）:0.7V @ 4A 稳压器数量:1 电流 - 输出:4A 电流 - 限制（最小）:4.2A 工作温度:0°C ~ 125°C 安装类型:表面贴装 封装/外壳:TO-263-6，D²Pak（5 引线+接片），TO-263BA 供应商设备封装:TO-263-5 包装:带卷 (TR) 其它名称:AP1184K525L-13AP1184K525LDITR |
| LT3024EFE#PBF | 功能描述:IC REG LDO ADJ .5A/.1A 16-TSSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 系列:- 标准包装:1 系列:- 稳压器拓扑结构:正，固定式 输出电压:8V 输入电压:10.5 V ~ 23 V 电压 - 压降（标准）:1.7V @ 40mA 稳压器数量:1 电流 - 输出:100mA（最小值） 电流 - 限制（最小）:- 工作温度:0°C ~ 125°C 安装类型:表面贴装 封装/外壳:8-SOIC（0.154"，3.90mm 宽） 供应商设备封装:8-SOIC 包装:剪切带 (CT) 产品目录页面:1075 (CN2011-ZH PDF) 其它名称:296-24390-1 |
| LT3024EFE#TR | 功能描述:IC REG LDO ADJ .5A/.1A 16TSSOP RoHS:否 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 系列:- 标准包装:800 系列:- 稳压器拓扑结构:正，固定式 输出电压:2.5V 输入电压:最高 16V 电压 - 压降（标准）:0.7V @ 4A 稳压器数量:1 电流 - 输出:4A 电流 - 限制（最小）:4.2A 工作温度:0°C ~ 125°C 安装类型:表面贴装 封装/外壳:TO-263-6，D²Pak（5 引线+接片），TO-263BA 供应商设备封装:TO-263-5 包装:带卷 (TR) 其它名称:AP1184K525L-13AP1184K525LDITR |
| LT3024EFE#TRPBF | 功能描述:IC REG LDO ADJ .5A/.1A 16TSSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 系列:- 标准包装:800 系列:- 稳压器拓扑结构:正，固定式 输出电压:2.5V 输入电压:最高 16V 电压 - 压降（标准）:0.7V @ 4A 稳压器数量:1 电流 - 输出:4A 电流 - 限制（最小）:4.2A 工作温度:0°C ~ 125°C 安装类型:表面贴装 封装/外壳:TO-263-6，D²Pak（5 引线+接片），TO-263BA 供应商设备封装:TO-263-5 包装:带卷 (TR) 其它名称:AP1184K525L-13AP1184K525LDITR |
| LT3024EFEPBF | 制造商:Linear Technology 功能描述:LT3024 dual adj 500/100mA LDO regulator |
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