参数资料
型号: LT3032IDE-5#PBF
厂商: Linear Technology
文件页数: 21/24页
文件大小: 0K
描述: IC REG LDO +-5V .15A 14DFN
标准包装: 91
稳压器拓扑结构: 正和负固定式
输出电压: ±5V
输入电压: ±2.3 V ~ ±20 V
电压 - 压降(标准): 0.27V @ 150mA,0.3V @ -150mA
稳压器数量: 2
电流 - 输出: 150mA
电流 - 限制(最小): 170mA
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 14-WFDFN 裸露焊盘
供应商设备封装: 14-DFN(4x3)
包装: 管件
LT3032 Series
APPLICATIONS INFORMATION
In situations where the ADJP pin is connected to a resistor
divider that would pull the ADJP pin above its 7V clamp
voltage if the output is pulled high, the ADJP pin input
current must be limited to less than 5mA. For example, a
resistor divider is used to provide a 1.5V output from the
1.22V reference and the output is forced to 20V. The top
resistor of the divider must be chosen to limit the current
into the ADJP pin to less than 5mA when the ADJP pin is
at 7V. The 13V difference between OUTP and ADJP divided
by the 5mA maximum current into the ADJP pin yields a
minimum top resistor value of 2.6k.
In circuits where a backup battery is required on the posi-
tive output, several different input/output conditions can
occur. The output voltage may be held up while the input
is either pulled to ground, pulled to some intermediate
voltage or is left open circuit. Current ?ow back into OUTP
follows the curve shown in Figure 6.
Like many IC power regulators, the negative side of the
LT3032 has safe operating area (SOA) protection. The safe
operating area protection activates when the differential
voltage between INN and OUTN is greater than -7V. The
SOA protection decreases current limit as a function of
the voltage differential between INN and OUTN and keeps
the power transistor inside a safe operating region for all
values of forward input-to-output voltage. The protection
is designed to provide some output current at all values
of INN to OUTN differential voltage up to the Absolute
Maximum Rating. A 50μA load is required to maintain
regulation for INN to OUTN differential voltages greater
than –7V. When in shutdown, protection circuitry remains
active and will cause the output to rise slightly at zero load.
A small pre-load is needed for zero output, if desired (see
graph of Quiescent Current vs Input Voltage in Typical
Performance Characteristics).
100
90
80
70
60
50
40
LT3032
T J = 25°C, V INP = 0V
CURRENT FLOWS
INTO OUTP PIN
V OUTP = V ADJP (LT3032)
LT3032-5
When power to the negative side is ?rst turned on, as the
input voltage rises, OUTN follows INN, allowing the regula-
tor to start into very heavy loads. During start-up, as the
INN voltage is rising, the differential voltage between INN
and OUTN is small, allowing the negative side to supply
large output currents. With a high INN voltage, a problem
can occur wherein removal of an output short will not al-
30
20
10
0
LT3032-12
LT3032-15
low the output voltage to fully recover. Other regulators,
such as the LT1175, LT1964, and LT3080 also exhibit this
phenomenon, so it is not unique to the LT3032.
0
2
4
6 8 10 12 14 16 18 20
OUTP PIN VOLTAGE (V)
3032 F06
The problem occurs with a heavy output load when the INN
voltage is high and the OUTN voltage is low. Common situ-
Figure 6. Reverse Output Current
If the INP pin is forced below the OUTP pin or the OUTP
pin is pulled above the INP pin, input current typically
drops to less than 2μA. This can happen if the device is
connected to a discharged (low voltage) battery and the
output is held up by a backup battery or a second regula-
tor circuit. The state of the SHDNP pin has no effect on
ations are immediately after the removal of a short-circuit
or when the SHDNN pin is pulled high after the INN pin
has already been turned on. The load line for such a load
may intersect the output current curve at two points. If
this happens, there are two stable operating points for the
negative side of the LT3032. With this double intersection,
the INN supply may need to be cycled down to zero and
brought up again to make OUTN recover.
the reverse output current if OUTP is pulled above INP.
3032fd
21
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