参数资料
型号: LT3083IDF#TRPBF
厂商: Linear Technology
文件页数: 15/28页
文件大小: 0K
描述: IC REG LDO ADJ 3A 12-DFN
标准包装: 2,500
稳压器拓扑结构: 正,可调式
输出电压: 可调至 23V
输入电压: 1.2 V ~ 23 V
电压 - 压降(标准): 1.25V @ 3A
稳压器数量: 1
电流 - 输出: 3A
电流 - 限制(最小): 3A
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 12-WFDFN 裸露焊盘
供应商设备封装: 12-DFN-EP(4x4)
包装: 带卷 (TR)
LT3083
APPLICATIONS INFORMATION
THERMAL RESISTANCE
THERMAL RESISTANCE
THERMAL RESISTANCE
Thermal Considerations
The LT3083’s internal power and thermal limiting circuitry
protects itself under overload conditions. For continuous
normal load conditions, do not exceed the 125°C maximum
junction temperature. Carefully consider all sources of
thermal resistance from junction-to-ambient. This includes
(but is not limited to) junction-to-case, case-to-heat sink
interface, heat sink resistance or circuit board-to-ambient
as the application dictates. Consider all additional, adjacent
heat generating sources in proximity on the PCB.
Surface mount packages provide the necessary heat
sinking by using the heat spreading capabilities of the
PC board, copper traces, and planes. Surface mount heat
sinks, plated through-holes and solder-filled vias can also
spread the heat generated by power devices.
Junction-to-case thermal resistance is specified from the
IC junction to the bottom of the case directly, or the bottom
of the pin most directly in the heat path. This is the lowest
thermal resistance path for heat flow. Only proper device
mounting ensures the best possible thermal flow from this
area of the packages to the heat sinking material.
Note that the exposed pad of the DFN and TSSOP pack-
ages and the tab of the DD-PAK and TO-220 packages
are electrically connected to the output (V OUT ).
Tables 3 through 5 list thermal resistance as a function
of copper areas on a fixed board size. All measurements
were taken in still air on a 4-layer FR-4 board with 1oz
solid internal planes and 2oz external trace planes with a
total finished board thickness of 1.6mm. Layers are not
connected electrically or thermally.
Table 3. DF Package, 12-Lead DFN
COPPER AREA
TOPSIDE* BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT)
2500mm 2 2500mm 2 2500mm 2 18°C/W
1000mm 2 2500mm 2 2500mm 2 22°C/W
Table 4. FE Package, 16-Lead TSSOP
COPPER AREA
TOPSIDE* BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT)
2500mm 2 2500mm 2 2500mm 2 16°C/W
1000mm 2 2500mm 2 2500mm 2 20°C/W
225mm 2 2500mm 2 2500mm 2 26°C/W
100mm 2 2500mm 2 2500mm 2 32°C/W
*Device is mounted on topside.
Table 5. Q Package, 5-Lead DD-PAK
COPPER AREA
TOPSIDE* BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT)
2500mm 2 2500mm 2 2500mm 2 13°C/W
1000mm 2 2500mm 2 2500mm 2 14°C/W
125mm 2 2500mm 2 2500mm 2 16°C/W
*Device is mounted on topside.
T Package, 5-Lead TO-220
Thermal Resistance (Junction-to-Case) = 3°C/W
For further information on thermal resistance and using
thermal information, refer to JEDEC standard JESD51,
notably JESD51-12.
PCB layers, copper weight, board layout and thermal vias
affect the resultant thermal resistance. Tables 3 through 5
provide thermal resistance numbers for best-case 4-layer
boards with 1oz internal and 2oz external copper. Modern,
multilayer PCBs may not be able to achieve quite the same
level performance as found in these tables.
Calculating Junction Temperature
Example: Given an output voltage of 0.9V, a V CONTROL
voltage of 3.3V ±10%, an IN voltage of 1.5V ±5%, output
current range from 10mA to 3A and a maximum ambient
temperature of 50°C, what will the maximum junction
temperature be for the DD-PAK on a 2500mm 2 board with
topside copper of 1000mm 2 ?
225mm 2
100mm 2
2500mm 2
2500mm 2
2500mm 2
2500mm 2
29°C/W
35°C/W
*Device is mounted on topside.
3083fa
15
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