参数资料
型号: LT3083IFE#PBF
厂商: Linear Technology
文件页数: 13/28页
文件大小: 0K
描述: IC REG LDO ADJ 3A 16-TSSOP
标准包装: 95
稳压器拓扑结构: 正,可调式
输出电压: 可调至 23V
输入电压: 1.2 V ~ 23 V
电压 - 压降(标准): 1.25V @ 3A
稳压器数量: 1
电流 - 输出: 3A
电流 - 限制(最小): 3A
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 16-TSSOP(0.173",4.40mm)裸露焊盘
供应商设备封装: 16-TSSOP-EP
包装: 管件
LT3083
APPLICATIONS INFORMATION
BOTH CAPACITORS ARE 16V,
Y5V
–100
20
1210 CASE SIZE, 10μF
0
X5R
–20
–40
–60
Y5V
–80
–100
0 2 4 6 8 10 12 14 16
DC BIAS VOLTAGE (V)
3083 F03
Figure 3. Ceramic Capacitor DC Bias Characteristics
40
20
0 X5R
–20
–40
–60
–80
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10μF
–50 –25 0 25 50 75 100 125
TEMPERATURE (°C)
3083 F04
Figure 4. Ceramic Capacitor Temperature Characteristics
V IN LT3083
V CONTROL
+
OUT 10m
effective value as low as 1μF to 2μF for the DC bias voltage
applied and over the operating temperature range. The X5R
and X7R dielectrics result in more stable characteristics
and are more suitable for use as the output capacitor.
The X7R type has better stability across temperature,
while the X5R is less expensive and is available in higher
values. Care still must be exercised when using X5R and
X7R capacitors. The X5R and X7R codes only specify
operating temperature range and maximum capacitance
change over temperature. Capacitance change due to DC
bias with X5R and X7R capacitors is better than Y5V and
Z5U capacitors, but can still be significant enough to drop
capacitor values below appropriate levels. Capacitor DC
bias characteristics tend to improve as component case
size increases, but expected capacitance at operating
voltage should be verified.
Voltage and temperature coefficients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltage across its terminals due to mechanical stress. In a
ceramic capacitor, the stress can be induced by vibrations
in the system or thermal transients.
Paralleling Devices
Higher output current is obtained by paralleling multiple
LT3083s together. Tie the individual SET pins together and
tie the individual IN pins together. Connect the outputs in
common using small pieces of PC trace as ballast resistors
to promote equal current sharing. PC trace resistance in
mΩ/inch is shown in Table 2. Ballasting requires only a
tiny area on the PCB.
Table 2. PC Board Trace Resistance
V IN
4.8V
TO 20V
10μF
V IN
V CONTROL
SET
SET
LT3083
+
OUT 10m
V OUT
3.3V
6A
WEIGHT (oz) 10mil WIDTH 20mil WIDTH
1 54.3 27.1
2 27.1 13.6
Trace resistance is measured in m?/in
The worst-case room temperature offset, only ±4mV
(DD-PAK, T Packages) between the SET pin and the OUT
pin, allows the use of very small ballast resistors.
33k
Figure 5. Parallel Devices
3083 F05
10μF
As shown in Figure 5, each LT3083 has a small 10m?
ballast resistor, which at full output current gives better
than 80% equalized sharing of the current. The external
3083fa
13
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