参数资料
型号: LT3092EDD#PBF
厂商: LINEAR TECHNOLOGY CORP
元件分类: 模拟信号调理
英文描述: SPECIALTY ANALOG CIRCUIT, PDSO8
封装: 3 X 3 MM, LEAD FREE, PLASTIC, MO-229WEED-1, DFN-8
文件页数: 5/22页
文件大小: 245K
代理商: LT3092EDD#PBF
LT3092
13
3092fb
APPLICATIONS INFORMATION
interface, heat sink resistance or circuit board-to-ambient
as the application dictates. Consider all additional, adjacent
heat generating sources in proximity on the PCB.
Surface mount packages provide the necessary heat
sinking by using the heat spreading capabilities of the
PC board, copper traces and planes. Surface mount heat
sinks, plated through-holes and solder lled vias can also
spread the heat generated by power devices.
Junction-to-case thermal resistance is specied from the
IC junction to the bottom of the case directly, or the bottom
of the pin most directly, in the heat path. This is the lowest
thermal resistance path for heat ow. Only proper device
mounting ensures the best possible thermal ow from this
area of the package to the heat sinking material.
Note that the Exposed Pad of the DFN package and the
Tab of the SOT-223 package are electrically connected
to the output (VOUT).
The following tables list thermal resistance as a function
of copper areas in a xed board size. All measurements
were taken in still air on a four-layer FR-4 board with 1oz
solid internal planes and 2oz external trace planes with a
total nished board thickness of 1.6mm.
PCB layers, copper weight, board layout and thermal vias
affect the resultant thermal resistance. Please reference
JEDEC standard JESD51-7 for further information on high
thermal conductivity test boards. Achieving low thermal
resistance necessitates attention to detail and careful layout.
Figure 8. Connect Two LT3092s for Higher Current
Figure 9. Parallel Devices
3092 F08
1.33Ω
300Ω
IOUT
IOUT, 300mA
+
LT3092
10μA
+
LT3092
20k
IN
SET
OUT
3092 F09
IOUT
IOUT, 400mA
+
LT3092
10μA
+
LT3092
10μA
R
2.5Ω
Rx
50k
40mΩ*
*40mΩ PC BOARD TRACE
1V
IN
SET
R
VR
x
IN MAX
=
()
%
90
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