参数资料
型号: LT3495EDDB-1#TRPBF
厂商: Linear Technology
文件页数: 7/16页
文件大小: 0K
描述: IC REG BOOST ADJ 0.35A 10DFN
标准包装: 2,500
类型: 升压(升压)
输出类型: 可调式
输出数: 1
输出电压: 1.24 V ~ 40 V
输入电压: 2.3 V ~ 16 V
PWM 型: 混合物
频率 - 开关: 可调至 45kHz
电流 - 输出: 350mA
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 10-WFDFN 裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 10-DFN-EP(3x2)
LT3495/LT3495B/
LT3495-1/LT3495B-1
PIN FUNCTIONS
GND (Pins 1, 2): Ground. Tie directly to local ground
plane.
V CC (Pin 3): Input Supply Pin. Must be locally by-
passed.
CTRL (Pin 4): Dimming Pin. If not used, tie CTRL to 1.5V
or higher. If in use, drive CTRL below 1.235V to override
the internal reference. See Applications section for more
information.
SHDN (Pin 5): Shutdown Pin. Tie to 1.5V or more to en-
able chip. Ground to shut down.
FB (Pin 6): Feedback Pin. Minimize the metal trace area
to this pin to minimize noise. Reference voltage is 1.235V.
There is an internal 76k resistor from the FB pin to GND. To
BLOCK DIAGRAM
INPUT
R1
achieve the desired output voltage, choose R1 according
to the following formula:
  R1 = 76 ? (V OUT /1.235 – 1)k?
V OUT (Pin 7): Drain of Output Disconnect PMOS. Place a
bypass capacitor from this pin to GND. See Applications
information.
CAP (Pins 8, 9): Source of Output Disconnect PMOS.
Place a bypass capacitor from this pin to GND.
SW (Pin 10): Switch Pin. This is the collector of the in-
ternal NPN power switch. Minimize the metal trace area
connected to this pin to minimize EMI.
Exposed Pad (Pin 11): Ground. This pin must be soldered
to PCB.
6
FB
3
V CC
10
SW
9
CAP
8
CAP
7
V OUT
76k
START-UP CONTROL
4
CTRL
SWITCH CONTROL
DISCONNECT
CONTROL
5
SHDN
+
V REF
SHUNT CONTROL
GND
GND
2
1
11
3495 BD
3495b1b1fa
7
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