参数资料
型号: LT3496EFE#PBF
厂商: Linear Technology
文件页数: 12/20页
文件大小: 0K
描述: IC LED DRVR WT/RGB BCKLT 28TSSOP
标准包装: 50
恒定电流:
拓扑: PWM,降压(降压),升压(升压)
输出数: 3
内部驱动器:
类型 - 主要: 车载
类型 - 次要: RGB
频率: 330kHz ~ 2.1MHz
电源电压: 3 V ~ 30 V
安装类型: 表面贴装
封装/外壳: 28-SOIC(0.173",4.40mm 宽)裸露焊盘
供应商设备封装: 28-TSSOP 裸露焊盘
包装: 管件
工作温度: -40°C ~ 125°C
产品目录页面: 1340 (CN2011-ZH PDF)
LT3496
APPLICATIONS INFORMATION
I LED =
I LED =
ProgrammingtheLEDCurrent
The LED current of each channel is programmed by con-
necting an external sense resistor R SENSE in series with
the LED load, and setting the voltage regulation threshold
across that sense resistor using CTRL input. If the CTRL
voltage, V CTRL , is less than 1V, the LED current is:
V CTRL
10 ? R SENSE
If V CTRL is higher than 1V, the LED current is:
100mV
R SENSE
The CTRL pins should not be left open. The CTRL pin
can also be used in conjunction with a PTC thermistor to
provide overtemperature protection for the LED load as
shown in Figure 2.
2V
V REF
45k 50k
CTRL1 to CTRL3
5k
PTC
3496 F02
Figure 2
Thermal Considerations
The LT3496 is rated to a maximum input voltage of 30V
for continuous operation, and 40V for nonrepetitive one
second transients. Careful attention must be paid to the
internal power dissipation of the LT3496 at higher input
voltages to ensure that a junction temperature of 125°C
is not exceeded. This is especially important when operat-
ing at high ambient temperatures. The exposed pad on
the bottom of the package must be soldered to a ground
plane. This ground should then be connected to an internal
copper ground plane with thermal vias placed directly
under the package to spread out the heat dissipated by
the LT3496.
Board Layout
The high speed operation of the LT3496 demands careful
attention to board layout and component placement. The
exposed pad of the package is the only GND terminal of
the IC and is important for thermal management of the
IC. Therefore, it is crucial to achieve a good electrical
and thermal contact between the exposed pad and the
ground plane of the board. Also, in boost configuration,
the Schottky rectifier and the capacitor between GND and
the cathode of the Schottky are in the high frequency
switching path where current flow is discontinuous. These
elements should be placed so as to minimize the path
between SW and the GND of the IC. To reduce electro-
magnetic interference (EMI), it is important to minimize
the area of the SW node. Use the GND plane under SW
to minimize interplane coupling to sensitive signals. To
obtain good current regulation accuracy and eliminate
sources of channel to channel coupling, the CAP and LED
inputs of each channel of the LT3496 should be run as
separate lines back to the terminals of the sense resistor.
Any resistance in series with CAP and LED inputs should
be minimized. Finally, the bypass capacitor on the V IN sup-
ply to the LT3496 should be placed as close as possible
to the V IN terminal of the device.
3496ff
  
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