参数资料
型号: LT3503EDCB#TRPBF
厂商: Linear Technology
文件页数: 16/20页
文件大小: 0K
描述: IC REG BUCK ADJ 1A 6DFN
标准包装: 2,500
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.78 V ~ 16.2 V
输入电压: 3.6 V ~ 20 V
PWM 型: 电流模式
频率 - 开关: 2.2MHz
电流 - 输出: 1A
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 6-WFDFN 裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 6-DFN-EP(2x3)
LT3503
APPLICATIO S I FOR ATIO
damps the circuit and eliminates the voltage overshoot.
The extra capacitor improves low frequency ripple filtering
and can slightly improve the efficiency of the circuit,
though it is likely to be the largest component in the circuit.
An alternative solution is shown in Figure 10c. A 1 ?
resistor is added in series with the input to eliminate the
voltage overshoot (it also reduces the peak input current).
A 0.1 μ F capacitor improves high frequency filtering. This
solution is smaller and less expensive than the electrolytic
capacitor. For high input voltages its impact on efficiency
is minor, reducing efficiency less than one half percent for
a 5V output at full load operating from 20V.
Frequency Compensation
The LT3503 uses current mode control to regulate the
output. This simplifies loop compensation. In particular,
the LT3503 does not require the ESR of the output
capacitor for stability allowing the use of ceramic capaci-
tors to achieve low output ripple and small circuit size.
Figure 11 shows an equivalent circuit for the LT3503
control loop. The error amp is a transconductance ampli-
fier with finite output impedance. The power section,
consisting of the modulator, power switch and inductor,
is modeled as a transconductance amplifier generating an
output current proportional to the voltage at the V C node.
Note that the output capacitor integrates this current, and
that the capacitor on the V C node (C C ) integrates the error
amplifier output current, resulting in two poles in the loop.
R C provides a zero. With the recommended output
capacitor, the loop crossover occurs above the R C C C zero.
This simple model works well as long as the value of the
inductor is not too high and the loop crossover frequency
is much lower than the switching frequency. With a larger
ceramic capacitor (very low ESR), crossover may be
lower and a phase lead capacitor (C PL ) across the feed-
back divider may improve the phase margin and transient
response. Large electrolytic capacitors may have an ESR
large enough to create an additional zero, and the phase
lead may not be necessary.
If the output capacitor is different than the recommended
capacitor, stability should be checked across all operating
conditions, including load current, input voltage and tem-
perature. The LT1375 data sheet contains a more thor-
ough discussion of loop compensation and describes how
to test the stability using a transient load.
PCB Layout
For proper operation and minimum EMI, care must be
taken during printed circuit board layout. Figure 12 shows
the recommended component placement with trace,
ground plane and via locations. Note that large, switched
currents flow in the LT3503’s V IN and SW pins, the catch
diode (D1) and the input capacitor (C2). The loop formed
by these components should be as small as possible and
tied to system ground in only one place. These compo-
nents, along with the inductor and output capacitor,
should be placed on the same side of the circuit board, and
their connections should be made on that layer. Place a
LT3503
CURRENT MODE
g m =
0.8V
POWER STAGE
SW
1.1A/V
FB
R1
C PL
OUT
R C
24k
C C
100pF
V C
2M
g m =
200 μ A/V
ERROR
AMPLIFIER
780mV
ESR
+
C1
C1
GND
R2
3503 F11
Figure 11. Model for Loop Response
3503f
16
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