参数资料
型号: LT3573IMSE#PBF
厂商: Linear Technology
文件页数: 14/26页
文件大小: 0K
描述: IC REG FLYBACK ISO ADJ 16MSOP
产品培训模块: LT3573 Flyback Voltage Converter
标准包装: 37
类型: 回扫,隔离
输出类型: 可调式
输出数: 1
输出电压: 可调至 60V
输入电压: 3 V ~ 40 V
PWM 型: 电流模式,混合
频率 - 开关: 40kHz ~ 1MHz
电流 - 输出: 1.25A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 16-TFSOP(0.118",3.00mm 宽)裸露焊盘
包装: 管件
供应商设备封装: 16-MSOP,裸露焊盘
产品目录页面: 1332 (CN2011-ZH PDF)
配用: 732-3307-ND - BOARD EVAL FOR LT3573
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LT3573
APPLICATIONS INFORMATION
V IN(UVLO,RISING) =
+ 2.5μA ?R1
V IN(UVLO,FALLING) =
SecondaryLeakageInductance
In addition to the previously described effects of leakage
inductance in general, leakage inductance on the second-
ary in particular exhibits an additional phenomenon. It
forms an inductive divider on the transformer secondary
that effectively reduces the size of the primary-referred
flyback pulse used for feedback. This will increase the
output voltage target by a similar percentage. Note that
unlike leakage spike behavior, this phenomenon is load
independent. To the extent that the secondary leakage
inductance is a constant percentage of mutual inductance
(over manufacturing variations), this can be accommodated
by adjusting the R FB /R REF resistor ratio.
Winding Resistance Effects
Resistance in either the primary or secondary will reduce
overall efficiency (P OUT /P IN ). Good output voltage regula-
tion will be maintained independent of winding resistance
due to the boundary mode operation of the LT3573.
Bifilar Winding
A bifilar, or similar winding technique, is a good way to
minimize troublesome leakage inductances. However, re-
member that this will also increase primary-to-secondary
capacitance and limit the primary-to-secondary breakdown
voltage, so, bifilar winding is not always practical. The
Linear Technology applications group is available and
extremely qualified to assist in the selection and/or design
of the transformer.
The Switch Current Limit vs R ILIM plot in the Typical Per-
formance Characteristics section depicts a more accurate
current limit.
Undervoltage Lockout (UVLO)
The SHDN /UVLO pin is connected to a resistive voltage
divider connected to V IN as shown in Figure 8. The voltage
threshold on the SHDN /UVLO pin for V IN rising is 1.22V.
To introduce hysteresis, the LT3573 draws 2.5μA from the
SHDN /UVLO pin when the pin is below 1.22V. The hysteresis
is therefore user-adjustable and depends on the value of
R1. The UVLO threshold for V IN rising is:
1.22V ?(R1 + R2)
R2
The UVLO threshold for V IN falling is:
1.22V ?(R1 + R2)
R2
To implement external run/stop control, connect a small
NMOS to the UVLO pin, as shown in Figure 8. Turning the
NMOS on grounds the UVLO pin and prevents the LT3573
from operating, and the part will draw less than a 1μA of
quiescent current.
V IN
R1
SHDN /UVLO
Setting the Current Limit Resistor
LT3573
R2
RUN/STOP
CONTROL
(OPTIONAL)
The maximum current limit can be set by placing a resistor
between the R ILIM pin and ground. This provides some
flexibility in picking standard off-the-shelf transformers that
may be rated for less current than the LT3573’s internal
power switch current limit. If the maximum current limit
is needed, use a 10k resistor. For lower current limits,
the following equation sets the approximate current limit:
GND
3573 F08
Figure 8. Undervoltage Lockout (UVLO)
R ILIM = 65 ?10 3 (1.6A ? I LIM ) + 10k
3573fd
14
For more information www.linear.com/LT3573
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