参数资料
型号: LT3645EMSE#TRPBF
厂商: Linear Technology
文件页数: 7/24页
文件大小: 300K
描述: IC REG DL BUCK/LINEAR 12-MSOP
标准包装: 2,500
拓扑: 降压(降压)(1),线性(LDO)(1)
功能: 车载
输出数: 2
频率 - 开关: 750kHz
电压/电流 - 输出 1: 0.8 V ~ 16 V,500mA
电压/电流 - 输出 2: 0.8 V ~ 8 V,200mA
带 LED 驱动器:
带监控器:
带序列发生器:
电源电压: 3.6 V ~ 36 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 12-TSSOP (0.118",3.00mm 宽)裸露焊盘
供应商设备封装: 12-MSOP,裸露焊盘
包装: 带卷 (TR)
LT3645
7
3645f
 PIN FUNCTIONS
EN/UVLO (Pin 1/Pin 5): The EN/UVLO pin is used to enable 
the buck switching regulator and the low dropout linear
regulator (LDO). An accurate threshold of 1.23V allows the
user to set the undervoltage lockout point with a simple
resistor divider, see Precision Undervoltage Lockout sec-
tion for more information. The EN/UVLO pin can be tied
directly to V
IN
 if the UVLO or shutdown is not used.
FB (Pin 2/Pin 6): The FB pin programs the buck output 
voltage. The LT3645 regulates the FB pin to 0.8V. The
feedback resistor divider tap should be connected to this
pin. The output voltage is programmed according to the
following equation:
   
R1=R2"
V
OUT
0.8
1
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
where R1 connects between OUT and FB and R2 connects
between FB and GND. A good value for R2 is 10k.
GND (Pin 3, Exposed Pad Pin 13/Pin 7, Exposed Pad Pin 17):
The GND pin should be tied to a local ground plane below the
LT3645 and the circuit components. Return the feedback
dividers from FB and FB2 to this pin. The exposed pad
must be soldered to the PCB and electrically connected
to ground. Use a large ground plane and thermal vias to
optimize thermal performance.
DA (Pin 4/Pin 8): The DA pin senses the external catch 
diode current and prevents the buck regulator from switch-
ing if the sensed current is too high. Connect the anode
of the external Schottky catch diode to this pin.
BOOST (Pin 5/Pin 10): The BOOST pin provides a drive 
voltage to the internal bipolar NPN power switch. Tie a
0.1糉 capacitor between the BOOST and SW pins.
SW (Pin 6/Pin 9): The SW pin is the output of the internal 
buck power switch. Connect the inductor and the cathode
of the external catch Schottky diode to this pin.
V
IN
 (Pin 7/ Pin 11): The V
IN
 pin supplies current to the
LT3645s internal circuitry, to the internal buck power
switch, and to the LDO. The V
IN
 pin must be locally
bypassed.
V
CC2
 (Pin 8/Pin 14): The V
CC2
 pin supplies current to the
linear regulators output device. The V
CC2
 pin is also the
anode of an internal Schottky diode used to generate the
BOOST voltage. The V
CC2
 pin must be tied to a voltage
source greater than 2.5V to utilize the internal Schottky
boost diode. If the V
CC2
 pin is tied to a voltage lower than
2.5V, then an external Schottky diode must be connected
between a power supply greater than 2.5V (anode) and
the BOOST pin (cathode). Bypass this pin to ground with
a 0.1糉 capacitor close to the part.
OUT2 (Pin 9/Pin 15): The OUT2 pin is the output of the 
LDO. Connect a capacitor of at least 0.47糉 from this pin
to ground. See Frequency Compensation (LDO) section
for more details.
FB2 (Pin 10/Pin 16): The FB2 pin programs the LDO output 
voltage. The LT3645 regulates the FB2 pin to 0.797V. The
feedback resistor divider tap should be connected to this
pin. The output voltage is programmed according to the
following equation:
 
R3=R4
V
OUT2
0.797
1
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
where R3 connects between OUT2 and FB2 and R4
connects between FB2 and GND. A good value for R4 is
10k.
EN2 (Pin 11/Pin 4): The EN2 pin is used to enable the linear 
regulator. Pull this pin above 1.6V to enable the LDO. Pull
EN2 below 0.5V to disable the LDO.
NPG (Pin 12/Pin 3): The NPG pin is an open-collector 
output used to indicate that both buck and LDO output
voltages are in regulation. The NPG pin pulls low when
FB and FB2 both exceed 720mV.
NC (Pins 1, 2, 12, 13, QFN Only): No Connect Pins. Tie 
these to ground.
(MSOP/QFN)
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