参数资料
型号: LT3688IFE#PBF
厂商: LINEAR TECHNOLOGY CORP
元件分类: 稳压器
英文描述: SWITCHING REGULATOR, PDSO24
封装: LEAD FREE, PLASTIC, TSSOP-24
文件页数: 2/28页
文件大小: 415K
代理商: LT3688IFE#PBF
LT3688
10
3688f
OPERATION
The LT3688 is a constant-frequency, current mode step-
down regulator with two reset timers and a watchdog
timer that perform microprocessor supervisory functions.
Operation can be best understood by referring to the Block
Diagram. Keeping the EN/UVLO pin at ground completely
shuts off the part drawing minimal current from the VIN
source. To turn on the internal bandgap and the rest of the
logic circuitry, raise the EN/UVLO pin above the accurate
threshold of 1.25V. Also, VIN needs to be higher than 3.5V
for the part to start switching.
Switching Regulator Operation
An oscillator, with frequency set by RT, enables an RS ip
op, turning on the internal power switch. An amplier
and comparator monitor the current owing between the
VIN and SW pins, turning the switch off when this cur-
rent reaches a level determined by the voltage at VC. An
error amplier measures the output voltage through an
external resistor divider tied to the FB pin and servos the
VC voltage. If the error amplier’s output increases, more
current is delivered to the output; if it decreases, less
current is delivered. An active clamp on the VC voltage
provides current limit. The VC voltage is also controlled
by the internal soft-start circuit during start-up or after a
fault condition takes place.
An internal regulator provides power to the control cir-
cuitry. The internal regulator normally draws current from
the VIN pin, but if the BIAS pin is connected to an external
voltage higher than 3V, bias current will be drawn from the
external source (typically the regulated output voltage).
This improves efciency. The BIAS pin also provides a
current path to the internal boost diode that charges up
the boost capacitor. The switch driver operates either from
the VIN or from the BST pin. An external capacitor is used
to generate a voltage at the BST pin that is higher than
the VIN supply. This allows the driver to fully saturate the
internal NPN power switch for efcient operation. To further
optimize efciency, the LT3688 automatically switches to
Burst Mode operation in light load situations. Between
bursts, all circuitry associated with controlling the output
switch is shut down, reducing the input supply current to
115μA in a typical application.
A comparator monitors the current owing through the
catch diode via the DA pin. This comparator delays switch-
ing if the diode current goes higher than 1.2A (typical)
during a fault condition such as a shorted output with high
input voltage. Switching will only resume once the diode
current has fallen below the 1.2A limit. This way the DA
comparator regulates the valley current of the inductor
to 1.2A during short circuit. This will ensure that the part
will survive a short-circuit event.
Power-On Reset and Watchdog Timer Operation
The LT3688 has two power-on reset comparators that
monitor the regulated output voltages. If VOUT is 10%
below the regulation value, the RST pin is pulled low. Once
the output voltage crosses over 90% of the regulation
value, a reset timer is started and RST is released after
the programmed reset delay time. The reset delay is
programmable through the CPOR pin.
The watchdog typically monitors a microprocessor’s
activity. The watchdog can be enabled or disabled by ap-
plying a logic signal to the WDE pin. The watchdog timer
requires successive negative edges on the WDI pin to
come within a programmed time window to keep WDO
from going low. If the time between the two negative WDI
edges is too short or too long, then the WDO pin will be
pulled low. When the WDO pin goes low, it stays low for
a time period equivalent to 1/8th of the watchdog window
upper boundary. The WDO pin will go high again once the
timer expires or if the RST pin goes low. The watchdog
window upper and lower boundaries can be set through
the CWDT pin.
相关PDF资料
PDF描述
LT3688HFE#PBF SWITCHING REGULATOR, PDSO24
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