参数资料
型号: LT3694IUFD#TRPBF
厂商: Linear Technology
文件页数: 17/28页
文件大小: 338K
描述: IC REG TRPL BUCK/LINEAR 28QFN
标准包装: 2,500
拓扑: 降压(降压)(1),线性(LDO)(2)
功能: 任何功能
输出数: 3
频率 - 开关: 250kHz ~ 2.5MHz
电压/电流 - 输出 1: 0.75 V ~ 16 V,2.6A
电压/电流 - 输出 2: 控制器
电压/电流 - 输出 3: 控制器
带 LED 驱动器:
带监控器:
带序列发生器:
电源电压: 4 V ~ 36 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 28-WFQFN 裸露焊盘
供应商设备封装: 28-QFN(4x5)
包装: 带卷 (TR)
LT3694/LT3694-1
17
36941fb
Once EN/UVLO climbs above the first threshold, the inter-
nal circuitry of the LT3694 is turned on but the switching
regulator and LDOs remain shut off. A 2礎 current sink
on the EN/UVLO pin is activated to provide hysteresis for
the programmable undervoltage function.
The second threshold is an accurate 1.2V derived from the
internal reference. When EN/UVLO is above the second
threshold, the regulators turn on and the 2礎 current sink
turns off. This allows an accurate programmable UVLO
function by placing a resistor divider between V
IN
, EN/UVLO
and ground. Figure 6a shows the EN/UVLO block diagram
and Figure 6b shows connections for the programmable
UVLO function.
The trip level is set by the resistor ratio:
 
V
IN(UVTRIP)
=1.2V
R1+R2
R2
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
The hysteresis is set by R1:
 
V
IN(UVHYS)
=2礎 R1
The EN/UVLO pin may be driven with a logic output if the
programmable UVLO is not needed. The requirements for
the logic output are a low output voltage less than 0.35V
(to insure low current shutdown) and a high output volt-
age greater than 1.25V.
Low Dropout Regulator
Each low dropout regulator comprises an error amp, loop
compensation and a base drive amp. It uses the same
0.75V reference as the switching regulators. It requires
an external NPN pass transistor and 2.2糉 of output ca-
pacitance for stability.
The dropout characteristics will be determined by the pass
transistor. The collector-emitter saturation characteristics
will limit the dropout voltage. Table 5 lists some suitable
NPN transistors with their saturation specifications.
APPLICATIONS INFORMATION
Figure 6. Programmable UVLO Application
(6a) EN/UVLO Block Diagram
(6b) Programmable UVLO Application
EN/UVLO
INTERNAL
CIRCUITRY
SHUTDOWN
REGULATORS
0.5V
1.2V
2礎

+

+
V
IN
V
IN
UVLO HYSTERESIS
2礎 " R1
UNDERVOLTAGE TRIP LEVEL
R1
R2
EN/UVLO
1.2V "
(R1 + R2)
R2
LT3694
36941 FO4
The base drive voltage has a maximum voltage of 6V.
This will limit the maximum output of the regulator to
6V  V
BE(SAT)
 where V
BE(SAT)
 is the base-emitter saturation
voltage of the pass transistor.
Table 5. Low V
CESAT
 Transistors
PART NUMBER
V
CESAT
at
I
C
 = 1A   OUTLINE   MANUFACTURER
ZXTN25012EZ
ZXTN25020DG
0.06
0.075
SOT-89
SOT-223
Zetex
www.diodes.com
NSS20201JT1G
NSS12201LT1G
0.22
0.08
SC-89
SOT-23
ON Semiconductor
www.onsemi.com
CTLT3410-M621    0.28
1mm ?2mm
TLM621
Central Semiconductor
www.central-semi.com
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