参数资料
型号: LT3741IUF#PBF
厂商: LINEAR TECHNOLOGY CORP
元件分类: 稳压器
英文描述: SWITCHING CONTROLLER, 1070 kHz SWITCHING FREQ-MAX, PQCC20
封装: 4 X 4 MM, LEAD FREE, PLASTIC, MO-220WGGD-1, QFN-20
文件页数: 9/24页
文件大小: 243K
代理商: LT3741IUF#PBF
LT3741
17
3741fb
APPLICATIONS INFORMATION
Thermal Shutdown
The internal thermal shutdown within the LT3741 engages
at 163°C and terminates switching and resets soft-start.
When the part has cooled to 155°C, the internal reset is
cleared and soft-start is allowed to charge.
Switching Frequency Synchronization
The nominal switching frequency of the LT3741 is
determined by the resistor from the RT pin to ground and
may be set from 200kHz to 1MHz. The internal oscillator
may also be synchronized to an external clock through the
SYNC pin. The external clock applied to the SYNC pin must
have a logic low below 0.3V and a logic high higher than
1.25V. The input frequency must be 20% higher than the
frequency determined by the resistor at the RT pin. Input
signals outside of these specied parameters will cause
erratic switching behavior and subharmonic oscillations.
Synchronization is tested at 500kHz with a 200k RTresistor.
Operation under other conditions is guaranteed by design.
When synchronizing to an external clock, please be aware
that there will be a xed delay from the input clock edge to
the edge of switch. The SYNC pin must be grounded if the
synchronization to an external clock is not required. When
SYNC is grounded, the switching frequency is determined
by the resistor at the RT pin.
Shutdown and UVLO
The LT3741 has an internal UVLO that terminates switching,
resets all synchronous logic, and discharges the soft-start
capacitor for input voltages below 4.2V. The LT3741 also
has a precision shutdown at 1.55V on the EN/UVLO pin.
Partial shutdown occurs at 1.55V and full shutdown is
guaranteed below 0.5V with <1μA IQ in the full shutdown
state. Below 1.55V, an internal current source provides
5.5μA of pull-down current to allow for programmable
UVLO hysteresis. The following equations determine the
voltage divider resistors for programming the UVLO voltage
and hysteresis as congured in Figure 9.
R2
=
V
HYST
5.5A
R1
=
1.55V R2
V
UVLO – 1.55V
The EN/UVLO pin has an absolute maximum voltage of
6V. To accommodate the largest range of applications,
there is an internal Zener diode that clamps this pin. For
applications where the supply range is greater than 4:1,
size R2 greater than 375k.
Load Current Derating Using the CTRL2 Pin
The LT3741 is designed specically for driving high power
loads. In high current applications, derating the maximum
current based on operating temperature prevents damage
to the load. In addition, many applications have thermal
limitations that will require the regulated current to be re-
duced based on load and/or board temperature. To achieve
this, the LT3741 uses the CTRL2 pin to reduce the effective
regulated current in the load. While CTRL1 programs the
regulated current in the load, CTRL2 can be congured to
reduce this regulated current based on the analog voltage
at the CTRL2 pin. The load/board temperature derating is
programmed using a resistor divider with a temperature
dependant resistance (Figure 10). When the board/load
temperature rises, the CTRL2 voltage will decrease. To
reduce the regulated current, the CTRL2 voltage must be
lower than voltage at the CTRL1 pin.
LT3741
VIN
R2
VIN
R1
3741 F09
EN/UVLO
Figure 9. UVLO Conguration
LT3741
VREF
RNTC
RX
RV
R2
R1
(OPTION A TO D)
3741 F10
CTRL2
B
RNTC
A
RNTC
RX
D
RNTC
C
Figure 10. Load Current Derating vs Temperature
Using NTC Resistor
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