参数资料
型号: LT3845AMPFE#TRPBF
厂商: LINEAR TECHNOLOGY CORP
元件分类: 稳压器
英文描述: SWITCHING CONTROLLER, 500 kHz SWITCHING FREQ-MAX, PDSO16
封装: 4.40 MM, LEAD FREE, PLASTIC, TSSOP-16
文件页数: 9/26页
文件大小: 284K
代理商: LT3845AMPFE#TRPBF
LT3845A
17
3845afa
DVIN is typically chosen at a level acceptable to the user.
100mV to 200mV is a good starting point. Aluminum elec-
trolytic capacitors are a good choice for high voltage, bulk
capacitance due to their high capacitance per unit area.
The capacitor’s RMS current is:
ICIN(RMS) =IOUT
VOUT(VIN – VOUT)
(VIN)
2
If applicable, calculate it at the worst case condition,
VIN = 2VOUT. The RMS current rating of the capacitor
is specified by the manufacturer and should exceed the
calculated ICIN(RMS). Due to their low ESR (Equivalent
Series Resistance), ceramic capacitors are a good choice
for high voltage, high RMS current handling. Note that the
ripplecurrentratingsfromaluminumelectrolyticcapacitor
manufacturersarebasedon2000hoursoflife.Thismakes
it advisable to further derate the capacitor or to choose a
capacitor rated at a higher temperature than required.
The combination of aluminum electrolytic capacitors and
ceramic capacitors is an economical approach to meeting
the input capacitor requirements. The capacitor voltage
rating must be rated greater than VIN(MAX). Multiple
capacitors may also be paralleled to meet size or height
requirementsinthedesign.Locatethecapacitorveryclose
to the MOSFET switch and use short, wide PCB traces to
minimize parasitic inductance.
Output Capacitor Selection
The output capacitance, COUT, selection is based on the
design’s output voltage ripple,
DVOUT and transient load
requirements.
DVOUT is a function of DIL and the COUT
ESR. It is calculated by:
DVOUT =DIL ESR+
1
(8 fSW COUT)
APPLICATIONS INFORMATION
The maximum ESR required to meet a
DVOUT design
requirement can be calculated by:
ESR(MAX)
=
(
DVOUT)(L)(fSW)
VOUT 1–
VOUT
VIN(MAX)
Worst-case
DVOUT occurs at highest input voltage. Use
paralleled multiple capacitors to meet the ESR requirements.
IncreasingtheinductanceisanoptiontolowertheESRrequire-
ments. For extremely low
DVOUT, an additional LC filter stage
can be added to the output of the supply. Application Note
44 has some good tips on sizing an additional output filter.
Output Voltage Programming
A resistive divider sets the DC output voltage according
to the following formula:
R2
=R1
VOUT
1.231V
– 1
The external resistor divider is connected to the output of
theconverterasshowninFigure3.Toleranceofthefeedback
resistors will add additional error to the output voltage.
Example: VOUT = 12V; R1 = 10k
R2
=10k 12V
1.231V
1
=87.48kuse 86.6k 1%
The VFB pin input bias current is typically 25nA, so use
of extremely high value feedback resistors could cause a
converter output that is slightly higher than expected. Bias
current error at the output can be estimated as:
DVOUT(BIAS) = 25nA R2
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