参数资料
型号: LT3971IDD-5#PBF
厂商: Linear Technology
文件页数: 8/28页
文件大小: 0K
描述: IC REG BUCK 5V 1.2A 10DFN
标准包装: 121
类型: 降压(降压)
输出类型: 固定
输出数: 1
输出电压: 5V
输入电压: 4.3 V ~ 38 V
PWM 型: 电流模式,Burst Mode?
频率 - 开关: 200kHz ~ 2MHz
电流 - 输出: 1.2A
同步整流器:
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 10-WFDFN 裸露焊盘
包装: 管件
供应商设备封装: 10-DFN(3x3)
LT3971/LT3971-3.3/LT3971-5
TYPICAL PERFORMANCE CHARACTERISTICS
T A = 25°C, unless otherwise noted.
5V Start-Up and Dropout
V I N
V OUT
1.6
1.2
0.8
0.4
Feedback Regulation Voltage
5
4
3
2
Minimum Input Voltage to Switch
800kHz
10 LOAD
0.5s/DIV
3971 G34
0
2
2.5
3 3.5 4
INPUT VOLTAGE (V)
4.5
5
3971 G35
1
–55
–25
5 35 65 95
TEMPERATURE (°C)
125 155
3971 G36
PIN FUNCTIONS
(DFN, MSE10/MSE16)
BD (Pin 1/Pin 1): This pin connects to the anode of the
boost diode. The BD pin is normally connected to the output.
BOOST (Pin 2/Pin 3): This pin is used to provide a drive
voltage, higher than the input voltage, to the internal bipolar
NPN power switch.
SW (Pin 3/Pin 5): The SW pin is the output of an internal
power switch. Connect this pin to the inductor, catch diode,
and boost capacitor.
V IN (Pin 4/Pin 7): The V IN pin supplies current to the
LT3971’s internal circuitry and to the internal power switch.
This pin must be locally bypassed.
EN (Pin 5/Pin 8): The part is in shutdown when this pin
is low and active when this pin is high. The hysteretic
threshold voltage is 1.005V going up and 0.975V going
down. The EN threshold is only accurate when V IN is above
4.3V. If V IN is lower than 4.2V, ground EN to place the part
in shutdown. Tie to V IN if shutdown feature is not used.
FB (Pin 6, LT3971 Only/Pins 9, 10): The LT3971 regulates
the FB pin to 1.19V. Connect the feedback resistor divider
tap to this pin. Also, connect a phase lead capacitor between
FB and V OUT . Typically this capacitor is 10pF.
V OUT (Pin 6, LT3971-3.3 and LT3971-5 Only): The
LT3971-3.3 and LT3971-5 regulate the V OUT pin to 3.3V and
5V respectively. This pin connects to the internal 10MΩ
feedback divider that programs the fixed output voltage.
SS (Pin 7/Pin 12): A capacitor is tied between SS and
ground to slowly ramp up the peak current limit of the
LT3971 on start-up. The soft-start capacitor is only actively
discharged when EN is low. The SS pin is released when
the EN pin goes high. Float this pin to disable soft-start.
For applications with input voltages above 25V, add a 100k
resistor in series with the soft-start capacitor.
RT (Pin 8/Pin 13): A resistor is tied between RT and ground
to set the switching frequency.
PG (Pin 9/Pin 14): The PG pin is the open-drain output of
an internal comparator. PGOOD remains low until the FB
pin is within 9% of the final regulation voltage. PGOOD is
valid when the LT3971 is enabled and V IN is above 4.3V.
SYNC (Pin 10/Pin 15): This is the external clock synchro-
nization input. Ground this pin for low ripple Burst Mode
operation at low output loads. Tie to a clock source for
synchronization, which will include pulse-skipping at low
output loads. When in pulse-skipping mode, quiescent
current increases to 1.5mA.
GND (Exposed Pad Pin 11/Pin 16, Exposed Pad Pin 17):
Ground. The exposed pad must be soldered to PCB.
NC (None/Pins 2, 4, 6, 11): No Connect. These pins
are not connected to internal circuitry. Float these pins
to achieve FMEA fault tolerance. (See Fault Tolerance of
MS16E Package section.)
3971fd
8
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