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参数资料
| 型号： | LT3980IDE#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 7/24页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK ADJ 2A 14DFN |
| 标准包装： | 91 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.79 V ~ 52.2 V |
| 输入电压： | 3.6 V ~ 58 V |
| PWM 型： | 电流模式，Burst Mode? |
| 频率 - 开关： | 225kHz ~ 2.25MHz |
| 电流 - 输出： | 2A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 14-WFDFN 裸露焊盘 |
| 包装： | 管件 |
| 供应商设备封装： | 14-DFN-EP（4x3） |
LT3980
PIN FUNCTIONS
(DFN, MSOP)
SYNC (Pin 1/Pin 1): This is the external clock synchro-
nization input. Ground this pin for low ripple Burst Mode
operation at low output loads. Tie to a voltage above 0.8V
to select pulse-skipping mode. Tie to a clock source for
synchronization. Clock edges should have rise and fall
times faster than 1μs. Tie pin to GND if not used. See the
Synchronization section in Applications Information.
NC (Pins 2, 13/Pins 3, 5, 13, 16): No Connect. These
pins are not connected to internal circuitry.
PG (Pin 3/Pin 2): The PG pin is the open collector output
of an internal comparator. PG remains low until the FB pin
is within 9% of the final regulation voltage. PG output is
valid when V IN is above 3.6V and RUN/SS is high.
FB (Pin 4/Pin 4): The LT3980 regulates the FB pin to 0.790V.
Connect the feedback resistor divider tap to this pin.
V C (Pin 5/Pin 6): The V C pin is the output of the internal
error amplifier. The voltage on this pin controls the peak
switch current. Tie an RC network from this pin to ground
to compensate the control loop.
RT (Pin 6/Pin 7): Oscillator Resistor Input. Connecting
a resistor to ground from this pin sets the switching
frequency.
GND (Pin 7, 15/Pin 8, 17): Ground. The exposed pads
BLOCK DIAGRAM
must be soldered to the PCB.
RUN/SS (Pin 8/Pin 9): The RUN/SS pin is used to put the
LT3980 in shutdown mode. Tie to ground to shut down
the LT3980. Tie to 2.5V or more for normal operation. If
the shutdown feature is not used, tie this pin to the V IN
pin. RUN/SS also provides a soft-start function; see the
Applications Information section.
BD (Pin 9/Pin 10): This pin connects to the anode of the
boost Schottky diode. BD also supplies current to the
internal regulator.
BOOST (Pin 10/Pin 11): This pin is used to provide a drive
voltage, higher than the input voltage, to the internal bipolar
NPN power switch.
SW (Pin 11/Pin 12): The SW pin is the output of the
internal power switch. Connect this pin to the inductor,
catch diode and boost capacitor.
V IN (Pin 12/Pin 14): The V IN pin supplies current to the
LT3980’s internal regulator and to the internal power switch.
This pin must be locally bypassed.
DA (Pin 14/Pin 15): This pin measures catch diode current
and pauses the oscillator during overcurrent conditions.
V IN
V IN
C1
INTERNAL 0.79V REF
BD
RUN/SS
Σ
SLOPE COMP
SWITCH
LATCH
BOOST
R T
RT
SYNC
SOFT-START
OSCILLATOR
100kHzTO2.4MHz
R
Q
S
DISABLE
BurstMode
DETECT
SW
DA
C3
D1
L1
C2
V OUT
PG
GND
+
–
0.725V
FB
ERROR AMP
+
–
V C CLAMP
V C
C C
R C
C F
R2
R1
3680 BD
3980fa
For more information www.linear.com/LT3980
7
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