参数资料
型号: LT4351IMS#TRPBF
厂商: Linear Technology
文件页数: 9/20页
文件大小: 0K
描述: IC CTRLR MOSFET DIODE-OR 10MSOP
标准包装: 2,500
应用: 并行/冗余电源
FET 型: N 沟道
输出数: 1
内部开关:
延迟时间 - 关闭: 600ns
电源电压: 1.2 V ~ 18 V
电流 - 电源: 1.4mA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 10-TFSOP,10-MSOP(0.118",3.00mm 宽)
供应商设备封装: 10-MSOP
包装: 带卷 (TR)
LT4351
OPERATION
R B = ?
– 1 ? R A
R A =
UV HYST
V UV
The on-chip boost regulator uses a constant off-time
control scheme. When V DD is below the regulation trip
voltage, the switch turns on after a 600ns off-time. When
the switch turns on current ramps up in the inductor until
the current limit is reached (450mA). The switch turns
off and the inductor’s current flows through the external
diode to charge up the V DD capacitor. If V DD is still too low,
the switch turns on again after a fixed off-time of 600ns.
APPLICATIONS INFORMATION
Setting Fault Thresholds
The gate drive amplifier implements the ideal diode func-
tion. The fault comparators (UV and OV) prevent out of
range input voltages from affecting the output by disabling
the amplifier during these conditions. Think of the UV and
OV as gating the ideal diode function, something a regular
diode cannot do.
A resistive divider from V IN to UV and one from V IN to OV
are the usual way of setting the FAULT thresholds. For UV
the resistor values are set by:
R2 =
I UVHYST
R1 = ? R2
UV FAULT – V UV
where UV HYST is the desired undervoltage hysteresis at
the input. UV FAULT is the desired undervoltage trip volt-
The boost regulator regulates V DD to approximately 10.7V
above V IN When V DD is above this level, the SW transistor
turn-on is disabled. When V DD falls below this level by the
hysteresis level, the SW transistor is allowed to turn on.
There is approximately 0.15V of hysteresis.
age at the input. V UV is the part undervoltage trip point
(0.3V) and I HYSTUV is the undervoltage hysteresis current
(10μA). See Figure 1.
The divider on the OV pin is a straightforward resistive
divider (Figure 2):
? OV FAULT ?
? V OV ?
0.3V
R A ,R B Divider Current
where OV FAULT is the desired overvoltage trip point at the
input and V OV is the OV pin threshold (0.3V). The OV pin
has 7mV of voltage hysteresis at room.
It is possible to do both dividers together using only three
resistors though with more interdependence in compo-
nents (Figure 3). The input bias current for UV and OV is
less than 200nA, so keep resistor values less than 10k.
V IN
R2
V IN
R2
V IN
V IN
R3
V IN
R2B
UV
R1
V UV
300mV
I HYS
10μA
UV
R1
V UV
300mV
I HYS
10μA
R B
OV
R A
V OV
300mV
R2
R1
UV
OV
C1
R2A
R1
UV
4351 F02
4351 F01
UV TURNING ON
UV TURNING OFF
4351 F03
4351 F04
Figure 1
Figure 2
Figure 3
Figure 4
4351fd
9
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