参数资料
型号: LT8410EDC-1#TRPBF
厂商: LINEAR TECHNOLOGY CORP
元件分类: 稳压器
英文描述: 0.01 A SWITCHING REGULATOR, PDSO8
封装: 2 X 2 MM, LEAD FREE, PLASTIC, DFN-8
文件页数: 16/16页
文件大小: 309K
代理商: LT8410EDC-1#TRPBF
LT8410/LT8410-1
9
84101fb
or 0805 size capacitor will be adequate. A 0.1μF to 1μF
capacitor placed on the CAP node is recommended to filter
the inductor current, while a 0.1μF to 1μF capacitor placed
on the VOUT node will give excellent transient response
and stability. To make the VREF pin less sensitive to noise,
puttingacapacitorontheVREFpinisrecommended,butnot
required.A47nFto220nF0402capacitorwillbesufficient.
Table 2 shows a list of several capacitor manufacturers.
Consult the manufacturers for more detailed information
and for their entire selection of related parts.
Table 2. Recommended Ceramic Capacitor Manufacturers
MANUFACTURER
PHONE
WEB SITE
Taiyo Yuden
(408) 573-4150
www.t-yuden.com
Murata
(814) 237-1431
www.murata.com
AVX
(843) 448-9411
www.avxcorp.com
Kemet
(408) 986-0424
www.kemet.com
TDK
(847) 803-6100
www.tdk.com
Setting Output Voltage
The output voltage is set by the FBP pin voltage. VOUT is
equal to 31.85 VFBP when the output is regulated, as
shown in Figure 1. Since the VREF pin provides a good
reference (1.235V), the FBP voltage can be easily set by
a resistor divider from the VREF pin to ground. The series
resistanceofthisresistordividershouldbekeptlargerthan
200KΩ to prevent loading down the VREF pin. The FBP pin
can also be biased directly by an external reference. For
overvoltage protection, the output voltage is limited to
40V. Therefore, if VFBP is higher than 1.235V, the output
voltage will stay at 40V.
APPLICATIONS INFORMATION
FBP VOLTAGE (V)
0
OUTPUT
VOL
TAGE
(V)
50
40
30
10
20
0
8410-1 F01
2
1
1.5
0.5
Figure 1. FBP to VOUT Transfer Curve
Connecting the Load to the CAP Node
The efficiency of the converter can be improved by con-
necting the load to the CAP pin instead of the VOUT pin.
The power loss in the PMOS disconnect circuit is then
made negligible. No quiescent current will be consumed
in the internal feedback resistor divider string during
shutdown since the PMOS transistor will be open and the
internal feedback resistor divider is connected at the VOUT
pin. The disadvantage of this method is that the CAP node
cannot go to ground during shutdown, but will be limited
to around a diode drop below VCC. Loads connected to the
part should only sink current. Never force external power
supplies onto the CAP or VOUT pins.
Maximum Output Load Current
The maximum output current of a particular LT8410 series
circuitisafunctionofseveralcircuitvariables.Thefollowing
method can be helpful in predicting the maximum load
current for a given circuit:
Step 1. Calculate the peak inductor current:
IPK =ILIMIT +
VIN 150 10
–6
L
mA
where ILIMIT is 25mA and 8mA for LT8410 and LT8410-1
respectively. L is the inductance value in henrys and VIN
is the input voltage to the boost circuit.
Step 2. Calculate the inductor ripple current:
IRIPPLE =
VOUT + 1– VIN
(
)20010–6
L
mA
where VOUT is the desired output voltage. If the inductor
ripple current is less than the peak current, then the circuit
will only operate in discontinuous conduction mode. The
inductor value should be increased so that IRIPPLE < IPK.
An application circuit can be designed to operate only in
discontinuous mode, but the output current capability
will be reduced.
Step 3. Calculate the average input current:
IIN(AVG) =IPK
IRIPPLE
2
mA
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