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| 型号： | LT8582EDKD#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 11/36页 |
| 文件大小： | 0K |
| 描述： | IC REG MULTI CONFIG ADJ 3A 24DFN |
| 标准包装： | 52 |
| 类型： | 升压（升压），反相，回扫，Sepic |
| 输出类型： | 可调式 |
| 输出数： | 2 |
| 输出电压： | 最高 42V |
| 输入电压： | 2.5 V ~ 22 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 200kHz ~ 2.5MHz |
| 电流 - 输出： | 3A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-WFDFN 裸露焊盘 |
| 包装： | 管件 |
| 供应商设备封装： | 24-DFN（7x4） |
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LT8582
OPERATION
Sample Mode
Sample mode is the mechanism used by the LT8582 to
aid in the detection of output shorts. It refers to a state of
the LT8582 where the master and slave power switches
(Q1 and Q2) are turned on for a minimum period of time
every clock cycle (or every few clock cycles in frequency
foldback) in order to sample the inductor current. If the
sampled current through Q1 exceeds the master switch
fault current limit of 2A (minimum), the LT8582 triggers
an overcurrent fault internally for that channel (see Op-
eration – Fault section for details). Sample mode exists
when FBX for that channel is out of regulation by more
than 4% (65mV < FBX < 1.15V). During this mode, PG
will be pulled low.
Frequency Foldback
The frequency foldback circuit reduces the switching
frequency for that channel when 144mV < FBX < 1.03V
(typical). This feature lowers the minimum duty cycle that
the channel can achieve, thus allowing better control of
the inductor current during start-up. When the FBX volt-
age is pulled outside of the above mentioned range, the
switching frequency for that channel returns to normal.
Note that the peak inductor current at start-up is a function
of many variables including load profile, output capacitance,
target V OUT , V IN , switching frequency, etc.
OPERATION – REGULATION
The following description of the LT8582’s operation as-
sumes that the FBX voltage is close enough to its regulation
target so that the part is not in sample mode. Also, this
description applies equally to both channels independently
of each other. Use the Block Diagram as a reference when
stepping through the following description of the LT8582
operating in regulation.
At the start of each oscillator cycle, the SR latch (SR1) is
collector current through the master switch, Q1, is ~1.3
times the collector current through the slave switch, Q2,
when the collectors of the two switches are tied together.
Q1’s emitter current flows through a current sense resis-
tor (R S ) generating a voltage proportional to the switch
current. This voltage (amplified by A4) is added to a sta-
bilizing ramp and the resulting sum is fed into the positive
terminal of the PWM comparator A3. When the voltage on
the positive input of A3 exceeds the voltage on the nega-
tive input, the SR latch is reset, turning off the master and
slave power switches. The voltage on the negative input
of A3 (V C pin) is set by A1 (or A2), which is simply an
amplified difference between the FBX pin voltage and the
reference voltage (1.204V if the LT8582 is configured as a
noninverting converter, or 7mV if configured as an invert-
ing converter). In this manner, the error amplifier sets the
correct peak current level to maintain output regulation.
As long as the channel is not in fault and the SS pin ex-
ceeds 1.84V, the LT8582 drives the CLKOUT pin for that
channel at the frequency set by the RT pin or the SYNC
pin. The CLKOUT pin can synchronize other ICs, including
additional LT8582s or the other channel of an LT8582, up
to 120pF load on CLKOUT. For channel 1, CLKOUT1 has a
fixed duty cycle and is 180° out of phase with the internal
clock. For channel 2, CLKOUT2’s duty cycle varies linearly
with channel 2’s junction temperature and may be used
as a temperature monitor.
OPERATION – FAULT
Each of the following events can trigger a fault in the LT8582:
1. SW Overcurrent:
a. I SWA > 2A (minimum)
b. (I SWA + I SWB ) > 3.5A (minimum)
2. V IN Voltage > 22.2V (minimum)
3. Die Temperature > 165°C
set, which turns on the power switches Q1 and Q2. The
8582f
11
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相关代理商/技术参数 |
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| LT8582IDKD#PBF | 功能描述:IC REG MULTI CONFIG ADJ 3A 24DFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:250 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.2V 输入电压:2.05 V ~ 6 V PWM 型:电压模式 频率 - 开关:2MHz 电流 - 输出:500mA 同步整流器:是 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:6-UFDFN 包装:带卷 (TR) 供应商设备封装:6-SON（1.45x1） 产品目录页面:1032 (CN2011-ZH PDF) 其它名称:296-25628-2 |
| LT8582IDKD#PBF | 制造商:Linear Technology 功能描述:DC/DC CONVRTER BOOST INVERTING SEPIC |
| LT8582IDKD#TRPBF | 功能描述:IC REG MULTI CONFIG ADJ 3A 24DFN RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 设计资源:Design Support Tool 标准包装:1 系列:- 类型:升压（升压） 输出类型:固定 输出数:1 输出电压:3V 输入电压:0.75 V ~ 2 V PWM 型:- 频率 - 开关:- 电流 - 输出:100mA 同步整流器:是 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-5 细型，TSOT-23-5 包装:剪切带 (CT) 供应商设备封装:TSOT-23-5 其它名称:AS1323-BTTT-30CT |
| LT8584IFE#PBF | 制造商:Linear Technology 功能描述:IC BATT CELL BALANCE 16TSSOP 制造商:Linear Technology 功能描述:BATTERY BALANCER, 2.5V-5.3V, TSSOP-16, Supply Voltage Min:2.5V, Supply Voltage M |
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